Request for advice on elegant usage of RXEDGIE/F in SCI

[awtfire]

I'm developing application software for a low-cost, low-power sensor product, using an MC9S08QE8.  I'm a fairly experienced developer, but I'm using this product for the first time.

The micro stays in STOP3 mode for the vast majority of its life, waking only briefly once every second to monitor AtoDs, do signal processing, make decisions, etc.

I need to use the SCI to Rx/Tx using very simple protocol (2 bytes in, one out), very occasionally.   My intention is to wake the micro from STOP3 using an interrupt from RXEDGIF, then use RDRF/TDRE/TC to complete the very standard Rxn and Txn.  I've used a similar SCI before, but have never used the RXEDGIF/E feature.

After some fiddling and head scratching, I have it working, but I'm not really happy with the solution.  RXEDGIF is set on every -ve edge on the Rxd pin, so, as I only want to use it to wake the micro, I clear RXEDGIE after the first interrupt from RXEDGIF.  However, this seems a cumbersome process as RXEDGIE is located in the baud rate register, which requires both bytes to be written (high then low).  Once my Rxn & Txn is complete I then have to rewrite the whole 16-bit baud rate just to set RXEDGIE for the next sequence.  Also RXEDGIF is still set on every -ve Rxd edge so I have to ignore this flag each time I get an RDRF interrupt, as they share the same vector.

Questions:

1) Can RXEDGIE be set/cleared without writing to both high and low baud rate registers?

2) Can anyone suggest a more elegant solution to this problem?

3) Why is RXEDGIF (among others) cleared by writing a 1 to it?

[bigmac · Accepted solution]

Hello, and welcome to the forum.

My interpretation of SCI operation is that, if you were to write to SCIBDH register to alter the state of the RXEDGIE bit, this would not affect the current baud rate, whatever value was written, unless SCIBDL is also written afterwards.  Therefore, it would appear unnecessary to write to other than SCIBDH for this purpose, unless you are also changing the baud rate.

Once you have disabled further RXEDG interrupts after the first start bit edge, even though the flag may become set on subsequent edges, this will not cause additional interrupts.  So any further interrupts would be due to RDRF.  I do not see any problem here.  After SCI activity has ceased, simply clear RXEDGIF immediately prior to re-enabling the interrupt, and entering stop 3 mode.

The purpose of writing 1 to clear a flag is usually to prevent the unintentional clearing of the flag, especially when more than one flag is present within a register.  However, there can be a potential problem with this method.  Never use a read-modify-write process with such registers - always directly write a value to the register.  If a read-modify-write is used to change the state of another bit within the register, this will clear all flag bits.

Regards,

Mac

[awtfire]

Thank you, bigmac, for a very useful and comprehensive response.

I will try writing the RXEDGIE bit in isolation, and see if it still works.

Could you please direct me to any examples of using such MC9S08 features?  I find the reference manuals to be on the whole excellent, but a little lacking in standard practice examples, in comparison with the old 68HC05 series manuals (I know I'm showing my age here!).  I understand that examples may be out of place in a reference manual, but basic examples of correct sequences are always useful for first time users to reduce development time.

Thanks again, bigmac.

[awtfire]

Just to confirm Mac's post above, a single write to SCIBDH to set or clear RXEDGIE, does have the required effect, and produces a more elegant solution.

Thanks, Mac.