In my FHSS system I have a period of time when I must detect a 38.4KHz clock coming from my radio chip. I'm using the input capture on a timer to do this. Works fine. I'm also using the RTI in my system (40ms period), but during the time when I'm detecting the clock I have to disable the interrupts from the RTI so it doesn't interfere with my timer ISR (it barely has enough time to do its thing). I do the clock detecting in 56 1.8msec periods. It is during the 1.8ms periods that I clear the RTIE to disable the RTI, and between those periods when the radio chip is changing channels I set the RTIE for a few cycles to allow the RTI to interrupt. If it had timed out during the 1.8ms while the RTIE was clear, I would expect to get an interrupt as soon as I set the RTIE bit. It doesn't.
So the question is, is it normal behavior for the RTI to not interrupt if it times out when its RTIE bit is clear and then the RTIE bit is subsequently set?
(QG8)