ICGC1_RANGE = 0; /* range low. */ICGC1_OSCSTEN = 1; /* Osc enabled in off mode. */ICGC1_REFS = 0; /* interal ref off */ICGC1_CLKS1 = 1;ICGC1_CLKS0 = 1; /*FEE external ref fll engaged */ while (!ICGS1_ERCS) /* Wait for external reference to be stable. */ __RESET_WATCHDOG(); while (!ICGS2_DCOS) /* Wait for external reference to be stable. */ __RESET_WATCHDOG();
while (!ICGS1_ERCS)the second while loop would be passed if the first is disabled. But anyway if I do so the clocking result is far from the expected behavior. The supplied external clock is stable and the shematic looks like the suggested in the datasheet with CLKO connected to EXTAL and XTAL n.c.