Hello BP,
I would suspect that the "half frequency" operation would be implemented by temporarily changing the RFD setting, rather than the DCO frequency, with the previous setting automatically restored once the external reference has stabilised and lock is regained.
I assume it is done this way to avoid any possibility that the maximum bus frequency be exceeded whilst in SCM mode. It does seem strange that there is no mention in the datasheet. I wonder if this applies only to a RFD setting of 1, or to all RFD settings. If the latter, it is probably an extra divide by two stage that is switched into circuit.
Regards,
Mac