How to block the COP Resets

[Saga]

Hi to all, i want to block the watchdog's resets, in the datasheet it says this:

Computer Operating Properly (COP) Watchdog—Reset was caused by the COP watchdog timer timing out.
This reset source can be blocked by COPE = 0.
0 Reset not caused by COP timeout.
1 Reset caused by COP timeout.

But there is no register called COPE in the definitions for my microcontroller (MC9S08DZ32). Thank you in advance!

[bigmac]

Hello,

The label COPE actually refers to a particular bit within the System Options (SOPT) register.  Note that this is a "write once" register, so the COPE bit must be cleared at the same time as all other bits are set or cleared.

Regards,

Mac

[J2MEJediMaster]

In the HCS08 Peripheral Module Quick Reference manual, the section on low power modes shows that the COPE is a bit in the system options register (SOPT).

---Tom