Hello the Ghost,
The AND instruction ALWAYS AND's with the accumulator!
The example you show is not valid.
One way to perform your example is:
LDA PTAD
AND PTBD
Your other question would be:
LDA #$AA
AND PTAD
Here is the instruction from the manual:
AND Logical AND ANDOperation A ← (A) & (M)Description Performs the logical AND between the contents of A and the contents ofM and places the result in A. Each bit of A after the operation will be thelogical AND of the corresponding bits of M and of A before the operation.Condition Codesand BooleanFormulae:V: 0ClearedN: R7Set if MSB of result is 1; cleared otherwiseZ: R7&R6&R5&R4&R3&R2&R1&R0Set if result is $00; cleared otherwiseSource Forms,AddressingModes, MachineCode, Cycles, andAccess DetailsV H I N Z C0 1 1 — — ↕ ↕ —SourceFormAddr.ModeMachine Code HCS08CyclesAccessOpcode Operand(s) DetailAND #opr8i IMM A4 ii 2 ppAND opr8a DIR B4 dd 3 rppAND opr16a EXT C4 hh ll 4 prppAND oprx16,X IX2 D4 ee ff 4 prppAND oprx8,X IX1 E4 ff 3 rppAND ,X IX F4 3 rfpAND oprx16,SP SP2 9ED4 ee ff 5 pprppAND oprx8,SP SP1 9EE4 ff 4 prppFreescale Semiconductor, IFreescale Semiconductor, Inc.For More Information On This Product,Go to: www.freescale.comnc
Hi Ghost,
You misunderstand, " AND PTAD, PTBD" is not a valid instruction in the S08. It should be giving you a syntax error.
The AND instruction ONLY works with the accumulator. To AND the immediate value $AA to the accumulator, the instruction would be " AND #$AA". To AND the contents of memory to the accumulator, the instruction would be "AND <address>", regardless of whether <address> is flash, ram or a port. There is no instruction to AND directly to memory or a port.
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Oops: I see Peg and I cross-posted.
Hello the Ghost,
The AND instruction ALWAYS AND's with the accumulator!
The example you show is not valid.
One way to perform your example is:
LDA PTAD
AND PTBD
Your other question would be:
LDA #$AA
AND PTAD
Here is the instruction from the manual:
AND Logical AND ANDOperation A ← (A) & (M)Description Performs the logical AND between the contents of A and the contents ofM and places the result in A. Each bit of A after the operation will be thelogical AND of the corresponding bits of M and of A before the operation.Condition Codesand BooleanFormulae:V: 0ClearedN: R7Set if MSB of result is 1; cleared otherwiseZ: R7&R6&R5&R4&R3&R2&R1&R0Set if result is $00; cleared otherwiseSource Forms,AddressingModes, MachineCode, Cycles, andAccess DetailsV H I N Z C0 1 1 — — ↕ ↕ —SourceFormAddr.ModeMachine Code HCS08CyclesAccessOpcode Operand(s) DetailAND #opr8i IMM A4 ii 2 ppAND opr8a DIR B4 dd 3 rppAND opr16a EXT C4 hh ll 4 prppAND oprx16,X IX2 D4 ee ff 4 prppAND oprx8,X IX1 E4 ff 3 rppAND ,X IX F4 3 rfpAND oprx16,SP SP2 9ED4 ee ff 5 pprppAND oprx8,SP SP1 9EE4 ff 4 prppFreescale Semiconductor, IFreescale Semiconductor, Inc.For More Information On This Product,Go to: www.freescale.comnc