Hope, the FCLKDIV is right...
;initialisation for RG60 @ 8MHz
LDA #19
STA FCDIV ;flash clk freq divider setup ((fosc)/200000)-1
LDA #$30
STA FSTAT ;clear errors
LDA #$F8
STA FPROT ;unprotect
;subroutine for program HCS08 byte,
;input data and address on stack
PROG:
PSHA ;save data
PSHX ;save Lo(addr)
PSHH ;save Hi(addr)
LDHX #FSTAT
FCBEF:
LDA ,X
AND #$80 ;FCBEF bit
BEQ FCBEF ;wait until command buffer empty
PULH
PULX
PULA
STA ,X ;write desired data to desired address
AIX #1
PSHX
PSHH
LDHX #FCMD
LDA #$25 ;BURST_PGM command code
STA ,X ;write PGM command
LDHX #FSTAT
LDA #$80 ;FCBEF bit
STA ,X ;start command execution
PULH
PULX
RTS
Andik