Design Note: To prevent S08PA/PT hung up by multiple short reset signals when POR

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Design Note: To prevent S08PA/PT hung up by multiple short reset signals when POR

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LaMoris
NXP Employee
NXP Employee

Found that S08PA/PT family can be hung up by multiple short reset signals input to reset pin when POR.

To put RC components on reset pin is suggested as what in document.

The hung up issue happens when no RC on reset pin.

The workaround is:

1) To configure reset as a GPIO.

2) To enable internal glitch filter in the beginning of main() as below, the filter clock source must be LPOCLK rather than BUSCLK. It's not a total solution due to MCU could be hung up at some corner conditions:

PORT_IOFLT2_FLTRST = 3;

PORT_FCLKDIV_FLTDIV3 = 7;

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