MMDC IO mux information for LPDDR3 for i.MX7D

[yuuki]

Dear all,

We want to connect LPDDR3 to i.MX7D.

We referred to Muxing Options of the reference manual.
http://www.nxp.com/files/32bit/doc/ref_manual/IMX7DRM.pdf
  - 8.1.1.1 Muxing Options

However, we think that this is the IO name for DDR3.

May we have MMDC IO mux information for LPDDR3?
or
Is there the schematic of LPDDR3 connection which NXP recommends?

Would you confirm whether the table which we made is correct when there is not these information?

Best Reagrds,
Yuuki

[yuuki]

Dear NXP support,

We found a Schematics for WaRP7.
In WaRP7, i.MX7Solo and LPDDR3 are used.

https://www.element14.com/community/docs/DOC-82961/l/design-file-for-warp7-board-schematics-pcb-layo...

About connection of LPDDR3, is this the Schematic which NXP recommends?

May I have advice?

Best Regards,
Yuuki

[Yuri · Accepted solution]

Hello,

   Basically it is possible to use the WaRP7 design.

Also I have sent You NXP schematic for validation board via e-mail.

Hope it helps.

Have a great day,
Yuri

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[federiconatali]

Hi, I'm new of the community. I also need to connect a LPDDR2 (1Gb x32) to i.MX7D, thus I wish to ask if the warp7 schematic is the recommend one, and/or if you can send a NXP schematic for validation board. 

Thanks.

[Yuri]

Hello, Natali!

As for  "if the warp7 schematic is the recommend one" - yes , customers can use it. 

Regards,

Yuri.

[yuuki]

Dear Natali-san,

I'm sorry for the delay in my response.

Unfortunately, I cannot send NXP schematic for validation board to you, because  I think that it is under NDA.

If you need it, I recommend that you contact to Yuri-san.

Best Regards,
Yuuki