Hi Shawn
Tonyp is right. The Tx interrupt is active whenever the output buffer is empty, which is true when nothing has been sent yet. The strategy is:
FIRST WRITE (egs for UART 1):
if (SCISR1_1 & TDRE) { // tx not busy ucDummy = SCISR1_1; // read interrupt flags to ensure empty flag is reset when the character is written SCIDRL_1 = ucTxByte; // send first byte SCICR2_1 |= (TIE); // enable TX interrupt }
ON TX interrupts
if (SCISR1_1 & RDRF) { if (more to send) { SCIDRL_1 = ucTxByte; // send next byte } else { SCICR2_1 &= ~(TIE); // disable Tx interrupts } }
Regards
Mark Butcher
www.mjbc.ch / www.uTasker.com