RAM Paging in MC9S12XDT512

[geek_saurabh]

Hi ,
I am using Freescale's MC9S12XDT512 in one of my projects.

Currently I am using 12K RAM (S12X CPU local map , 0x1000-0x4000) but I need to use 20K RAM which is physically available on SOC.

Through technical manuals I have learnt that for RAM paging I have to write the appropriate page number to RPAGE register.

This will virtually map the 4K page from physically available 20K memory to the 4k page window in CPU local's map.

Now,Could anyone tell me the steps to allow RAM paging.

Also,how does the CodeWarrior facilitates for the same.

Thanks in Advance.

Saurabh

[kef]

1) Add to compiler command line, or make sure that -D__FAR_DATA is present in compiler command line

2.a) In case you are too lazy to edit prm file, and don't plan to use more than 4k (the size of RPAGE window) of paged RAM

#pragma DATA_SEG __RPAGE_SEG PAGED_RAM

char p1,p2; 

char arr[100];

#pragma DATA_SEG DEFAULT               

That's all. Just access variables, defined between DATA_SEG pragmas. In case you need to export variables, extern declarations for your varriables also should placed between identical DATA_SEG pragmas in header file.

2.b) In case you are too lazy to edit prm file, but want to use more than 4k of paged RAM. Do the same like in 2.a), but additionally add -PSegObj switch to compiler command line. This is important, because without -PSegObj, compiler assumes that all objects from the same placement are on the same page, which won't be always true for default prm file with PAGED_RAM placement consisting of several RAM page segments. -PSegObj forces compiler to set up RPAGE before each paged variable access.

2.c) You are familiar with prm, want safe compiler optimizations of redundant page switchings, don't like -PSegObj.

So you edit PRM file and add your own placements, each using only one RAM page. Like this

      PAGED_RAM_FB INTO RAM_FB;

      PAGED_RAM_FC INTO RAM_FC;

      PAGED_RAM_FD INTO RAM_FD;

You stop using PAGED_RAM placement and place your paged vars into PAGED_RAM_FB. When there's no room in PAGED_RAM_FB (linker will tell you with error), you start filling PAGED_RAM_FC and so on

#pragma DATA_SEG __RPAGE_SEG PAGED_RAM_FB

char arr1[4096];

#pragma DATA_SEG DEFAULT               

#pragma DATA_SEG __RPAGE_SEG PAGED_RAM_FC

char arr2[4096];

#pragma DATA_SEG DEFAULT

3) Try to not use paged variables in interrupts and routines, called from interrupt handlers. But if you need to, then you need to save/restore RPAGE on entry/exit from interrupt. Alternatively you may make compiler saving/restoring RPAGE for you, but compiler will do this for each interrupt handler you have. Option to save restore RPAGE in interrupts is this -CpRPAGE=0x16

[luck]

Hi kef ,

1->I m working on MC9S12XDT512  and it has 20 k ram but right now i m using 12k only and wanted to use 20k so i did the necessary changes in prm file. Such as creating 3 ram pages and one fixed 8 k page.

2.->Now previously on 12k i had approx. 1.5 k of stack 2.5k of space for variable data storage and 8.3k of continuous heap.

3->But now with 20k i have 8 k fixed memory which i am using for stack and variable storage, the problem is i don't know how to use 3  4k ram pages to store 8.3 k of continuous heap . The code which i m working on is written for 12k fixed memory and i don't want to do much change in that.

so can you help me on this and suggest any work around. And also can you tell ,is it possible to break that 8.3k heap in two equal pieces and can be stored in diff ram pages .

Regards

[kef]

Hi

Do you mean you are using heap and memory allocation routines? Are these provided with Codewarrior libs? I'm asking because in CW default heap size is 2000 (not 8k like you said). Heap is allocated in HEAP_SEGMENT (see heap.c in library sources). To change heap size you would need to recompile library with modified define in libdefs.h:

#define LIBDEF_HEAPSIZE 2000

I assume you are using banked memory model. To move CW library heap to paged RAM you need to :

1) add -DLIBDEF_FAR_HEAP=1 to compiler command line before recompiling library

2) Edit PRM file, add HEAP_SEGMENT placement and make it allocated to paged RAM segment, for example to RAM_FB

3) Instead of recompiling whole library, you may add heap.c and alloc.c from library sources to your project. After adding them, go to Link Order tab of your project and move these files up, so that they appear above the *.lib file line.

Now far heap should work, but heap size will be limited to the size of 4k RAM segment (RAM_FB). Let me know if this is enough for you or not, since extra steps are required for >4k sized heap. For bigger heap you need to create single big RAM segment using global addresses.

Please note, that since you make heap far, malloc() will return pointer to far data, so you need far data pointers to allocated data.

char * far mydata = malloc(N);

Note also that in banked memory model memcpy/strcpy like routines won't be able to copy data to far memory, unless you recompile them with altered LIBDEF defines (see CrasyCat's response to this thread I can't copy data from RAM to RPAGE RAM with memcpy.).

Alternatively you may consider using large memory model, where memcpy and far heap should work out of the box, you may just need to edit prm file to change HEAP_SEGMENT placement.

[luck]

Thanks Kef for your reply.

Actually the code is not written by me so i dont understand it much.But one thing is sure that in the code there is 8.3k heap , there are also usermade new and delete function(overloading) for allocating and deleting memory.   

I did some research and found that we can not store data more then 4k on ram pages so use of global address might be helpfull.

But i dont know to use these address in prm file.

Like for ram paging we use FD,FB and FC with local address to make ram pages.But how to do it with global address i have no idea.

So can you provide some information on this

Thanks Again.

[kef]

You may comment out 4k segments in PRM file

/*

RAM_FB = READ_WRITE 0xFB1000 TO 0xFB1FFF;

RAM_FC = READ_WRITE 0xFC1000 TO 0xFC1FFF;

RAM_FD = READ_WRITE 0xFD1000 TO 0xFD1FFF;

*/

and define contiguous 4k*3 segment, specifying segment address using global addresses:

RAM_FBFCFD = READ_WRITE 0x0FB000'G TO 0x0FDFFF'G;

Then try adjusting your PLACEMENT lines in PRM file.

You need to make sure that DATA_SEG pragmas in your code use __GPAGE_SEG atribute instead of __RPAGE_SEG, like

#pragma DATA_SEG __GPAGE_SEG myplacement

[luck]

Thanks kef

That was really helpful .I m trying to implement it ,and will seek help if something goes wrong.

[geek_saurabh]

Hi kef.

Thanks a ton for you reply.

One thing:

Can we use both the local map and the paging mechanism at the same time.

Ex: from 0x1000-0x2000 we have the ram window which keeps on changing(or virtually mapping with phyical ram) when we write to RPAGE register.

and from 0x2000-0x4000 we have the contiguous 8K memory for our other purposes.

So can address local 8K ram area & paged 4K ram area simultaneously?If yes then what memory model we will choose.

[kef]

• Can we use both the local map and the paging mechanism at the same time.

Yes.

• So can address local 8K ram area & paged 4K ram area simultaneously?If yes then what memory model we will choose.

Yes. 8k nonpaged RAM is the least problematic and the fastest RAM on this chip. What I suggested previously should work in all memory models. Small and banked differs only by the amount of code. Small memory model is for small code, that fits nonpaged flash (in "CPU local memory map"). Large memory model can be used in case you are not allowed to use C extensions like far and near. In large memory model all data is far and paged by default.

[geek_saurabh]

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kef wrote:

• Can we use both the local map and the paging mechanism at the same time.

Yes.

• So can address local 8K ram area & paged 4K ram area simultaneously?If yes then what memory model we will choose.

Yes. 8k nonpaged RAM is the least problematic and the fastest RAM on this chip. What I suggested previously should work in all memory models. Small and banked differs only by the amount of code. Small memory model is for small code, that fits nonpaged flash (in "CPU local memory map"). Large memory model can be used in case you are not allowed to use C extensions like far and near. In large memory model all data is far and paged by default.

---

Thanks Kef.

---

kef wrote:

• Can we use both the local map and the paging mechanism at the same time.

Yes.

• So can address local 8K ram area & paged 4K ram area simultaneously?If yes then what memory model we will choose.

Yes. 8k nonpaged RAM is the least problematic and the fastest RAM on this chip. What I suggested previously should work in all memory models. Small and banked differs only by the amount of code. Small memory model is for small code, that fits nonpaged flash (in "CPU local memory map"). Large memory model can be used in case you are not allowed to use C extensions like far and near. In large memory model all data is far and paged by default.

---

Thanks Kef.

[kef]

Oh, yet another variant.

2.d) You don't like to edit PRM, don't like -PSegObj, but want to be safe using >4k. Instead of RPAGE, use global addressing. Since all RAM is on the same big GPAGE, you may be safe using PAGED_RAM placement just switching from RPAGE to GPAGE:

#pragma DATA_SEG __GPAGE_SEG PAGED_RAM

char p1,p2;

char arr[100];

char arr1[4096];

char arr2[4096];

#pragma DATA_SEG DEFAULT

Global addressing is little slower, but it may be easier for you.