RS485 support in P2040

[krishnaraj_d]

Hi,

I am using P2040 for serial communication with other devices. SDK Version is 2.0.0 and Linux 4.1.8. 8250 Driver in Linux is enabled for achieving serial communication.

We are looking to support RS485 with P2040 board. When I searched in net, I found that RS485 support can be enabled by setting values in device tree. But the linux driver code of 8250 does not seems to be taking dtb values. 

How can I enable RS485 support for P2040. Any help will be appreciated.

Best Regards

Krishnaraj

[alexander_yakov]

No, I'm not suggesting polling, I suggest using interrupt from ULSR[THRE] bit.

[krishnaraj_d]

THRE interrupt indicates that the transmitter FIFO does not contain any character. However data might be still there in the internal shift register. If I toggle the 485 transceiver based on this interrupt, some characters might not be send. For that I need to rely on ULSR[TEMT]. Unfortunately there is no interrupt available for that status.

[alexander_yakov]

Yes, your understanding is correct - there is no interrupt available for that status.

Please use interrupt from THRE and wait for 1 byte transmission time before disabling transceiver. As long as transmission speed is shown, this time can be easily calculated.

[krishnaraj_d]

Hi Alexander,

Thank you for your reply.

May be my question is wrong. Let me rephrase it.

In our board we have MAX 485 IC to convert TTL to RS485 signal level. However that IC to be controlled for transmission ( using RTS/GPIO).  ie, IC to be made in transmitting mode by toggling GPIO high and switch back to receive mode by toggling GPIO low from P2040

My solution to this case is 

a) Make GPIO high in serial8250_start_tx

b) Make GPIO low in fsl8250_handle_irq when the transmitter holding register is empty. 

Whether this will work ? Or any better way to achieve this functionality ?

Best Regards

Krishnaraj

[alexander_yakov]

Yes, this is the usual way to control the direction of MAX485. There is no better way.

[krishnaraj_d]

It seems i can not really depend on THRE interrupt for ensuring the complete transmission of packet. It might be still there in the FIFO register. There is not interrupt available to know that transmitter is empty (TEMT). Could you propose a way to overcome this problem. I don't see any example also.

Best Regards

Krishnaraj

[alexander_yakov]

According to the description of THRE bit is ULSR register in P2040 Reference Manual, in FIFO mode this bit is set, when the transmitter FIFO contains no data character.

[krishnaraj_d]

But there is no interrupt for FIFO Empty. Are you suggesting to poll the LSR continuously ? Whether that is a CPU wastage ?

[alexander_yakov]

RS-485 is electrical standard - it defines only physical level (electrical characteristics of driver and receiver).

It does not define data format, transmission speeds and etc.

https://en.wikipedia.org/wiki/RS-485

There is no specific RS-485 related support in P2040 processor, from the hardware point of view P2040 supports only general UART (DUART). Driver "8250" is UART driver.

Have a great day,
Alexander
TIC

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