Q&A: What are the maximum HSP_CLK frequency values?

Document created by Yixing Kong Employee on Nov 11, 2013Last modified by Yixing Kong Employee on Nov 11, 2013
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Question:
The i.MX6 documentation gives several different values for the maximum frequency of the IPU’s HSP_CLK clock. What are the correct HSP_CLK maximum frequency values for the i.MX6 Dual/Quad and Solo/DualLite?

 

Can HSP_CLK run at 270 MHz on both the DQ and SDL CPUs, but it’s not clear from the documentation if this is permitted.

 

Maximum HSP_CLK frequencies listed in the reference manual (DQ):

  • 264 MHz (Table 9-2 (IPU IP Parametric Table), Table 9-5 (IPU Clock Sources))
  • 266 MHz (Table 18-3 (System Clock Frequency Values))

 

Maximum HSP_CLK frequencies listed in the reference manual (SDL):

  • 270 MHz (Table 9-2 (IPU IP Parametric Table), Table 9-5 (IPU Clock Sources), Table 18-3 (System Clock Frequency Values))

 

Answer:
Referring to Figure 18-2, IPU1_HSP_CLK_ROOT may be selected to have 1 of 4 sources. These sources are highlighted in yellow on the northwest corner of the page and the previous paragraph states these are max values. Possible sources are 540, 528, 396, and 480 MHz. The 480 MHz is divided by 4 before the selector, so winds up being 120 MHz. Per the diagram, these are all divided by 2 for IPU1_HSP_CLK_ROOT. The result is 270, 264, 198, and 60 MHz choices. Therefore, the max for IPU1_HSP_CLK_ROOT is 270 MHz for DQ.

 

MX6D/Q and MX6S/DL are different with respect to max HSP_CLK frequency.

MX6D/Q = 264 MHz max

MX6S/DL = 270 MHz max

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