Modified AN2295 UART bootloader for K21 (It's applicable to all Kinetis)

File uploaded by Neo Xiong Employee on Jun 27, 2013
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Hi, all

The default AN2295 UART bootloader doesn't work well on K21/other Kinetis because of using FEI and complicated autocalibration mechanism. I made a simple version to make it works on MK21DX128VMC5, FYI.

 

Readm.txt:

UART bootloader for K21. (Default is MK21DX128VMC5)

128KB_Pflash_64KB_Dflash.icf is application link script example for MK21DX128 used together with UART bootloader, UART bootloader use 0x0 - 0xFFF.

Q: Why need this patch?
A: The original AN2295 use internal RC and FLL output as system clock. The calibration mechanism is not stable. The main change of this patch is to use external cystal plus PLL as system clock to communicate with PC software.

Changes to AN2295
1) Add MK21D5.h for K21 support
2) Add AN2295_TWR_K21_cfg.h for K21 support(Copy from AN2295_TWR_K60_cfg.h)
3) AN2295_TWR_K21_cfg.h
   1> #define KINETIS_MODEL K21_50MHz
   2> #define KINETIS_FLASH FLASH_128K
   3> #define BOOT_UART_BASE UART2_BASE_PTR
      #define BOOT_UART_GPIO_PORT PORTE_BASE_PTR
      #define BOOT_UART_GPIO_PIN_RX   17
      #define BOOT_UART_GPIO_PIN_TX   16
   4> #define BOOT_PIN_ENABLE_NUM        7
4) Add mcg folder and mcg.c/mcg.h
5) kinetis_params.h:
   1> Modify SRS_REG/SRS_POR_MASK/INIT_CLOCKS_TO_MODULES to meet MK21D5.h
   2> Add PORT_PCR_PS_MASK for BOOTLOADER_PIN_ENABLE_INIT to enable Pull-up.
6) bootloader.h: #define BOOT_WAITING_TIMEOUT 500. PC software can't communicate to bootloader if only 1s delay.
7) bootloader.c:
   1> #include "mcg.h"
   2> Use 25MHz PEE:
      SIM_CLKDIV1 = ( 0    | SIM_CLKDIV1_OUTDIV1(1)
                           | SIM_CLKDIV1_OUTDIV2(1)
                           | SIM_CLKDIV1_OUTDIV4(1));
     
      (void)pll_init(8000000,       /* CLKIN0 frequency */
                     LOW_POWER,     /* Set the oscillator for low power mode */
                     CRYSTAL,       /* Crystal or canned oscillator clock input */
                     4,             /* PLL predivider value */
                     25,            /* PLL multiplier */
                     MCGOUT);       /* Use the output from this PLL as the MCGOUT */
   3> Restore to FEI mode before jump to Application:
      pee_pbe(8000000);
      pbe_fbe(8000000);
      fbe_fei(32768);

Knowing issues:
1) Don't use virtualCOM from OSJTAG, it's very hard to communicate with PC software. Use RS232 in TWR-SER2.
2) BOOTLOADER_CRC_ENABLE must be 0, otherwise PC software will report unknown protocol version

 

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