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* Detailed Description:
* Purpose of the example is to show how to generate EDC after ECC error in
* internal FLASH. Error response in achieved by reading of pre-defined patterns
* in UTEST area at address 0x00400080 which generates IVOR1 exception and FCCU
* interrupt (FCCU_Alarm_Interrupt).
* Example does not show any handling as it is application specific.
* The example displays notices in the terminal window (connector J19 on
* MPC57xx_Motherboard)(19200-8-no parity-1 stop bit-no flow control on eSCI_A).
* No other external connection is required.
* ------------------------------------------------------------------------------
* Test HW: MPC57xx_Motherboard + MPC5744P-144DC
* MCU: PPC5744PFMLQ8,0N15P,QQAA1515N, Rev2.1B
* Fsys: 200 MHz PLL with 40 MHz crystal reference
* Debugger: Lauterbach Trace32
* Target: internal_FLASH, RAM
* Terminal: 19200-8-no parity-1 stop bit-no flow control
* EVB connection: default
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