Example MPC5775K Multicore GHS614

File uploaded by Peter Vlna Employee on Sep 21, 2017Last modified by Peter Vlna Employee on Sep 21, 2017
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* Detailed Description:

* This example content a basic PMPLL initialization and
* configuration of Mode Entry module and Clock Generation
* module. By default active is core 2 -> e200z4a
* Configure PIT timer to trigger interrupt and service it.
* Example configures start of z7 cores via SW routine.
* ------------------------------------------------------------------------------
* Test HW:  MPC57xx MB + MPC5775K-326DS minimodule
* Maskset:  0N76P
* Target :  internal_FLASH
* Fsys:     265 MHz PLL with 40 MHz crystal reference
*
********************************************************************************
Revision History:
1.0     Sep-07-2017     b21190(Vlna Peter)  Initial Version
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Example also contains Lauterbach multicore script as you can see below:

It will display 3 Power view instances.

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