This example simulates ECC issue by cumulative write into the same EEPROM area without an erasing.
The EEPROM erase operation set all bits into log1. The EEPROM program operation may keep bit cells in log1 state
or change it into log0 state, but not in opposite way.
The S12Z MCU EEPROM is protected by 22-Bit ECC Scheme. Every word (16bits) is protected by additional 6 bits with ECC checksum.
The ECC values are not accessible for users.
Every EEPROM reading triggers also ECC check by internal logic. The single bit error in user data may be corrected by ECC checksum.
The double bit error cannot be corrected.
The ECC protection is implemented also at flash controller commands and results are signalling by MGSTAT bits.
The first case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b10
due to fact that just 1 bit is different during write verification (correctable error)
The second case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b11
due to fact that more than 1 bits are different during write verification (non-correctable error)
The third case simulates Double-bit ECC error during reading. The MGSTAT bits after the second write are 0b11
due to fact that more than 1 bits are different during write verification (non-correctable error)
The EEPROM patterns are selected for highlighted described behavior and they don't have any real meaning.
The cumulative write is not allowed for normal operation!!!
The code from this example should be used only for design testing - not in production!!!
Please, see the prm file. Address range 0x100000-0x100001 is excluded from default EEPROM and is used as user EEPROM memory
The size of EEPROM sectors is 2 bytes. The EEPROM_Program() function may program up to 4 words in single flash command.
Note: The EEPROM_Program() function was updated - erase verification is skipped
I hope it helps you.
Radek
