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* Detailed Description:
*
* The example shows how to initialize 3 submodules to generate 120° phase shift
* between submodules.
* CNTR register of each submodule is initialized with shifted value when PWM
* generators are disabled using FORCE feature.
*
* ------------------------------------------------------------------------------
* Test HW: MPC5744P (MPC5744P-257DS + MPC577xx motherboard)
* Maskset: 1N15P
* Target : internal_FLASH, RAM
* Fsys: 200 MHz PLL with 40 MHz crystal reference
*
* EVB connection:
*
* P8.12 - A[11] .. FlexPWM A[0] output
* P8.11 - A[10] .. FlexPWM B[0] output
* P8.13 - A[12] .. FlexPWM A[2] output
* P8.14 - A[13] .. FlexPWM B[2] output
* P10.8 - C[7] .. FlexPWM A[1] output
* P10.7 - C[6] .. FlexPWM B[1] output
*
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