Example MPC5746R DPM (multicore) GHS614

File uploaded by Peter Vlna Employee on Sep 20, 2016Last modified by Peter Vlna Employee on Nov 15, 2016
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* Detailed Description:

* This example content a basic PMPLL initialization and
*  configuration of Mode Entry module and Clock Generation
*  module for core1 and start of core0 and core0s from Core_Init function.

* Also containts Lauterbach multicore multi-Trace32 view script for multicore

* debugging puproses

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* Test HW:  Test HW:  MPC57xx Motherboard + MPC5777M_512DS minimodule, MPC5777M,

* Test HW:  MPC57xx

* Maskset:  1N83M (cut 2.0B)

* Target :  internal_FLASH

* Fsys:     200MHz PLL0 as system clock

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Revision History:
1.0     Jun-09-2015     b21190(Vlna Peter)  Initial Version
1.1     Sep-20-2016     b21190(Vlna Peter)  core0+core0s boot function added

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