LWIP memory requirements

Document created by jorge_plascencia Employee on Apr 25, 2016Last modified by Diana Torres on Apr 26, 2016
Version 2Show Document
  • View in full screen mode

LPC177x_8x memory requirements

The LPC177x_8x device family is available with varying amounts of internal FLASH and IRAM. Depending on the device you select, the amount of FLASH available is bwteen 64KBytes and 256KBytes. Internal IRAM varies from 16KBytes to 64KBytes. All the devices also have peripheral RAM which can vary between 8KBytes to 32KByytes. Internal IRAM cannot be used for ethernet buffers (or any DMA buffers). Peripheral RAM can be used for ethernet buffers and/or CPU buffers. On the minimum device configuration, a chip will contain 64K of FLASH, 32K of internal IRAM, and 8K of peripheral RAM. In this minimum configuration, this amounts up to 64KBytes for code, 32KBytes maximum for CPU data, and 8KBytes for ethernet buffers. When using external memory such as DRAM, ethernet buffers can be located in external memory ande have no size limitations.

For the tcpecho example included with the LCP LWIP release, the memory sizes for different configurations are shown in the table below. These are not absolutely minimum buildable sizes and have extra buffers to prevent packet drops due to run-time memory allocation. All of these projects are built with the Keil toolchain at the -O3 optimization level. LWIP_DEBUG is not enabled. Note these images support DHCP, UDP, and broadcast.

Project descriptionNotesLinker output

tcpecho, FLASH

(standalone)

Stack_Size      EQU     0x00001000
Heap_Size       EQU     0x00000000
#define LPC_NUM_BUFF_RXDESCS 4
#define LPC_NUM_BUFF_TXDESCS 4
#define PBUF_POOL_SIZE                  4
#define MEM_SIZE                        16384
    Total RO  Size (Code + RO Data)                33772 (  32.98kB)
    Total RW  Size (RW Data + ZI Data)             34560 (  33.75kB)
    Total ROM Size (Code + RO Data + RW Data)      34016 (  33.22kB)

tcpecho, FLASH

(FreeRTOS)*

Stack_Size      EQU     0x00001000
Heap_Size       EQU     0x00000000
#define LPC_NUM_BUFF_RXDESCS 3
#define LPC_NUM_BUFF_TXDESCS 3
#define PBUF_POOL_SIZE                  6
#define MEM_SIZE                        (12*1024)
    Total RO  Size (Code + RO Data)                43800 (  42.77kB)
    Total RW  Size (RW Data + ZI Data)             67208 (  65.63kB)
    Total ROM Size (Code + RO Data + RW Data)      43848 (  42.82kB)

*FreeRTOS build also includes extra heap and stack space used by FreeRTOS and additional LWIP libraries and support for use with an RTOS.

Note these sizes may vary for many reasons including compiler/linker versions, selected build options, etc. The sizes are meant as a guideline for memory usage only.

LPC177x_8x memory requirements at the minimum system configuration

To get the minimum configuration for a build, the DHCP support, UDP support, and broadcast support is disabled and the build is setup with a static IP address.  The LWIP raw API is used with an RTOS. The table below shows configuration options and build size information. Debug is disabled and the -O3 optimization level is used with the Keil tools.

Project descriptionNotesLinker output

tcpecho, FLASH

(minimal, standalone)

Stack_Size      EQU     0x00000800
Heap_Size       EQU     0x00000000
#define LPC_NUM_BUFF_RXDESCS 3
#define LPC_NUM_BUFF_TXDESCS 2
#define PBUF_POOL_SIZE                  4
#define MEM_SIZE                        8192
    Total RO  Size (Code + RO Data)                33724 (  32.93kB)
    Total RW  Size (RW Data + ZI Data)             24260 (  23.69kB)
    Total ROM Size (Code + RO Data + RW Data)      33968 (  33.17kB)

LPC18xx/43xx memory requirements

The LPC18xx/43xx device family is available with varying amounts of IRAM. For the tcpecho example included with the LCP LWIP release, the memory sizes for different configurations are shown in the table below. These are not absolutely minimum buildable sizes and have extra buffers to prevent packet drops due to run-time memory allocation. All of these projects are built with the Keil toolchain at the -O3 optimization level. LWIP_DEBUG is not enabled. Note these images support DHCP, UDP, and broadcast.

Project descriptionNotesLinker output

tcpecho, FLASH

(standalone)

Stack_Size      EQU     0x00001000

Heap_Size       EQU     0x00000400#

define LPC_NUM_BUFF_RXDESCS 20

#define LPC_NUM_BUFF_TXDESCS 20

#define PBUF_POOL_SIZE                  64

#define MEM_SIZE                        (64*1024)

    Total RO  Size (Code + RO Data)                36432 (  35.58kB)
    Total RW  Size (RW Data + ZI Data)            177016 ( 172.87kB)
    Total ROM Size (Code + RO Data + RW Data)      36708 (  35.85kB)

tcpecho, FLASH

(FreeRTOS)*

Stack_Size      EQU     0x00001000
Heap_Size       EQU     0x00008000
#define LPC_NUM_BUFF_RXDESCS 20

#define LPC_NUM_BUFF_TXDESCS 20

#define PBUF_POOL_SIZE                  48
#define MEM_SIZE                        (64*1024)

    Total RO  Size (Code + RO Data)                46744 (  45.65kB)
    Total RW  Size (RW Data + ZI Data)            186172 ( 181.81kB)
    Total ROM Size (Code + RO Data + RW Data)      46792 (  45.70kB)

*FreeRTOS build also includes extra heap and stack space used by FreeRTOS and additional LWIP libraries and support for use with an RTOS.

Note these sizes may vary for many reasons including compiler/linker versions, selected build options, etc. The sizes are meant as a guideline for memory usage only.

LPC18xx/43xx memory requirements at the minimum system configuration

To get the minimum configuration for a build, the DHCP support, UDP support, and broadcast support is disabled and the build is setup with a static IP address.  The LWIP raw API is used without an RTOS. The table below shows configuration options and build size information. Debug is disabled and the -O3 optimization level is used with the Keil tools.

Project descriptionNotesLinker output

tcpecho, FLASH

(minimal, standalone)

Stack_Size      EQU     0x00000800
Heap_Size       EQU     0x00000000
#define LPC_NUM_BUFF_RXDESCS 3
#define LPC_NUM_BUFF_TXDESCS 2
#define PBUF_POOL_SIZE                  8
#define MEM_SIZE                        (12*1024)
    Total RO  Size (Code + RO Data)                36396 (  35.54kB)
    Total RW  Size (RW Data + ZI Data)             34656 (  33.84kB)
    Total ROM Size (Code + RO Data + RW Data)      36672 (  35.81kB)

Attachments

    Outcomes