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* Detailed Description:
*
* Simple LINFlex UART mode transmit and receive without interrupts (polled UART)
* TXFIFO and RXFIFO macro is used to select between buffer and FIFO mode
*
* PIT channel 0 is also used to generate 1sec interrupt where PA0 pin is toggled.
*
* EVB connection:
*
* Motherboard
* J14 - SCI_RX OFF
* J13 - SCI_TX OFF
* J25 - SCI_PWR ON
*
* See results on PC terminal (19200, 8N1, None).
* ------------------------------------------------------------------------------
* Test HW: MPC5777M, MPC57xx Motherboard + MPC5777M_512DS minimodule
* Maskset: 0N78H
* Target : RAM, internal_FLASH
* Fsys: 600 MHz PLL1 with 40 MHz crystal reference,
* core2 at 200MHz generated from PPL1
* Terminal: 19200, 8N1
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