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* Detailed Description:
*
* LINFlex UART TXFIFO transmit using DMA
* LINFlex UART mode with FIFO receive using DMA
*
*
* EVB connection:
*
* Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver
* Daughtercard:
* J17.11–12 ON .. Connect LINFlexD_0 TXD (PB2) to main board.
* J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board.
*
* Motherboard
* J14 - SCI_RX ON
* J13 - SCI_TX ON
* J25 - SCI_PWR ON
*
* See results on PC terminal (baudrate 19200, Data bits 8, Stop bits 1, Parity none).
*
* ------------------------------------------------------------------------------
* Test HW: MPC57xx
* Maskset: 1N65H
* Target : internal_FLASH (debug mode, release mode without debugging information)
* Fsys: 200 MHz PLL with 40 MHz crystal reference
* Terminal: 19200, 8N1, None
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