Example MPC5748G FlexCAN DMA ISR

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Example MPC5748G FlexCAN DMA ISR

Example MPC5748G FlexCAN DMA ISR

********************************************************************************

* Detailed Description:

*

* CAN0 module is configured to transmit one message with ID 0x555 to CAN1

* module. CAN1 module is configured to use DMA to receive the message.

* Once the DMA module reads the received frame, interrupt is triggered.

* Follow application note AN4830 regarding the CAN settings.

* http://www.freescale.com/files/microcontrollers/doc/app_note/AN4830.pdf

* http://www.freescale.com/files/microcontrollers/doc/app_note/AN4830SW.zip

* The example from AN4830 is modified to use DMA and RXFIFO on CAN1 module.

*

* ------------------------------------------------------------------------------

* Test HW:  MPC57xx

* Maskset:  1N81M

* Target :  SRAM

* Fsys:     160 MHz PLL

*

********************************************************************************

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%3CLINGO-SUB%20id%3D%22lingo-sub-1113931%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3EExample%20MPC5748G%20FlexCAN%20DMA%20ISR%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1113931%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3E********************************************************************************%3C%2FP%3E%3CP%3E*%20Detailed%20Description%3A%3C%2FP%3E%3CP%3E*%3C%2FP%3E%3CP%3E*%20CAN0%20module%20is%20configured%20to%20transmit%20one%20message%20with%20ID%200x555%20to%20CAN1%3C%2FP%3E%3CP%3E*%20module.%20CAN1%20module%20is%20configured%20to%20use%20DMA%20to%20receive%20the%20message.%3C%2FP%3E%3CP%3E*%20Once%20the%20DMA%20module%20reads%20the%20received%20frame%2C%20interrupt%20is%20triggered.%3C%2FP%3E%3CP%3E*%20Follow%20application%20note%20AN4830%20regarding%20the%20CAN%20settings.%20%3C%2FP%3E%3CP%3E%3CSPAN%3E*%20%3C%2FSPAN%3E%3CA%20class%3D%22jive-link-external-small%22%20href%3D%22http%3A%2F%2Fwww.freescale.com%2Ffiles%2Fmicrocontrollers%2Fdoc%2Fapp_note%2FAN4830.pdf%22%20rel%3D%22nofollow%20noopener%20noreferrer%22%20target%3D%22_blank%22%3Ehttp%3A%2F%2Fwww.freescale.com%2Ffiles%2Fmicrocontrollers%2Fdoc%2Fapp_note%2FAN4830.pdf%3C%2FA%3E%3C%2FP%3E%3CP%3E%3CSPAN%3E*%20%3C%2FSPAN%3E%3CA%20class%3D%22jive-link-external-small%22%20href%3D%22http%3A%2F%2Fwww.freescale.com%2Ffiles%2Fmicrocontrollers%2Fdoc%2Fapp_note%2FAN4830SW.zip%22%20rel%3D%22nofollow%20noopener%20noreferrer%22%20target%3D%22_blank%22%3Ehttp%3A%2F%2Fwww.freescale.com%2Ffiles%2Fmicrocontrollers%2Fdoc%2Fapp_note%2FAN4830SW.zip%3C%2FA%3E%3C%2FP%3E%3CP%3E*%20The%20example%20from%20AN4830%20is%20modified%20to%20use%20DMA%20and%20RXFIFO%20on%20CAN1%20module.%3C%2FP%3E%3CP%3E*%20%3C%2FP%3E%3CP%3E*%20------------------------------------------------------------------------------%3C%2FP%3E%3CP%3E*%20Test%20HW%3A%26nbsp%3B%20MPC57xx%3C%2FP%3E%3CP%3E*%20Maskset%3A%26nbsp%3B%201N81M%3C%2FP%3E%3CP%3E*%20Target%20%3A%26nbsp%3B%20SRAM%3C%2FP%3E%3CP%3E*%20Fsys%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20160%20MHz%20PLL%3C%2FP%3E%3CP%3E*%3C%2FP%3E%3CP%3E********************************************************************************%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-LABS%20id%3D%22lingo-labs-1113931%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CLINGO-LABEL%3EGeneral%3C%2FLINGO-LABEL%3E%3C%2FLINGO-LABS%3E
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Last update:
‎10-15-2015 05:10 AM
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