P1025/P1016 DDR Specific FAQs

Document created by Omar Cruz Lopez Employee on Aug 6, 2012Last modified by Omar Cruz Lopez Employee on Aug 6, 2012
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Does P1025 support 16 bits DDR3? I found DDR_SDRAM_CFG{DBW] can be set to 16bits. But no 16bits DDR3 feature is claimed?

Theoretically the DDR controller supports 16 bit mode. But the mode has not been tested/verified/validated in P1025. We recommend you to not use 16 mode of P1025.


“In asynchronous mode, the memory bus clock speed must be less than or equal to the CCB clock rate which in turn must be less than the DDR PLL rate." Is this statement correct for P1025?

No it is not correct. The correct statement is " In asynchronous mode, if the ratio of the DDR data rate to the CCB clock rate is greater than 3 :1 ( i.e. DDR=3:CCB=1 ), than the DDR performance monitor statistic accuracy cannot be guaranteed."


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