P1020/P1011 COP/JTAG Specific FAQs

Document created by Omar Cruz Lopez Employee on Jul 25, 2012
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I would like to put pull-down on TRST- signal rather than using a gate to tie to HRESET- (and then switch the gate out for debug). What value of pull-down should I choose so that it will not interfere with USBTap JTAG operation. Does TRST- have an internal pullup?

The TRST is active low signal in P1020, thus pulling it down will always keep JTAG in Reset position. For the proper working of SoC, The system must assert HRESET and TRST (Both active low), simultaneously.

If there is no specific use-case which needs JTAG always in reset, then it is better to gate it with HRESET.


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