I am about to work on them, so figured I would ask.
My CW4NET_v2018.01/CW_ARMv8/Config/flash/ directories have files for S25FS256S, S25FS512S, and S25FL128S.
Maybe I am the first to use the S25FS128S?
.Tim
After a quick review of data sheets, I could not find any difference between the S25FS256S and S25FS128S, so I just switched to that configuration and it seems to be working.
However, I am interested in the rest of the parameters to fl_device and have not found any information on them. The LS1012A_FRDM_init.py sets up the flash device with:
gdb.execute("fl_device --alias qspi --name S25FS512S --address 0x40000000 --waddress 0x10000000 --wsize 0x1FFFF --geometry 8x1 --controller QSPI")
I simply changed the name to S25FS256S and the programming seemed to succeed (better than with the 512 version anyway!). I am pretty confident that the address parameter is correct (address where QSPI is mapped). But I am not 100% sure I understand waddress and wsize refer to- the address and size seem to match the OCRAM, so I am guessing that the rest of the flash code uses that as the write area?
Also, I did not find anything in the datasheets for the S25FS...S parts that state the geometry of the chip. Does anyone know where this value came from and how I can verifiy it is correct for my part change?
Thanks!
.Tim
Hello Tim Hammer,
The flash algorithm runs in OCRAM, the parameter --waddress and --wsize are specified as OCRAM start address and OCRAM size. This setting can avoid the trouble for configuring DDR controller during custom boards bringing up. The parameter --geometry specifies QSPI works in 8 bit mode.
In addition, please refer to the file CW4NET_v2018.01\CW_ARMv8\Config\flash\algorithms\params\S25FS256S_QSPI_64.xml to create the parameters configuration for S25FS128S according to the datasheet, which will be imported in CW4NET_v2018.01\CW_ARMv8\Config\flash\algorithms\S25FS256S.xml.
Have a great day,
TIC
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