Hello,
On a project, I need to generate the 24MHz XTALi signal from an external oscillator which outputs 1.8V signals.
To meet the requirement of the iMXRT1052, I use a capacitive voltage divider but the signal out of the divider is below 0V (see attached picture) specified in the IMXRT1050IEC document, page 31.
The High level is also to close to Vihmin.
A resistive voltage divider modifies the signal too much.
What is the best way to do this voltage division in order to meet the NXP requirements?
Regards
Hi David OUATTARA,
Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
Please refer to the below figure to optimize the voltage divider, and note that: don't use the large resistors (> 300Ω) in the voltage divider.
Have a great day,
TIC
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