I’m evaluating ADC of RT1170.
I have 3 questions related to this post.
https://community.nxp.com/t5/i-MX-RT/RT1170-ADC-Input-Voltage/m-p/1479993
1. Is my understanding correct about the internal block of CSCALE as shown in the following diagram?
If the condition is NVCC_GPIO = 3.3V, VREFH = 1.8V and CSCALE = 1b, the ADC input range is 0 to 1.8V.
If the condition is NVCC_GPIO = 3.3V, VREFH = 1.54V and CSCALE = 0b, the ADC input range is 0 to 3.3V.
2. Is it no problem to use under the condition that NVCC_GPIO = 3.3V, VREFFH = 1.8V and CSCALE = 0b?
On this condition, the ADC input range will be 0 to 3.84V in calculation, but I'll use it up to 3.3V input.
I think the ADC resolution is worse than when used VREFH = 1.54V. Is there any other expected side effect?
3. When I create 1.54V of VREFH, is it no problem to be created by resistor divider? Or should I add buffer or something?
Solved! Go to Solution.
Hi,
Thank you so much for your interest in our products and for using our community.
Regarding your questions…
1. Your understanding is correct!
2. If the input is equal to or exceeds VREFH, the converter circuit converts the signal to 0x7FFF (or 0xFFFF), which is full scale 12-bit single ended (or 13-bit differential) representation. If the input is equal to or less than VREFL, the converter circuit converts it to 0x000. Input voltages between VREFH and VREFL are straight-line linear conversions.
3. You just need to take into account the Table 12. Maximum supply currents from datasheet.
Hope it helps you.
Have a nice day!
Hi,
Thank you so much for your interest in our products and for using our community.
Regarding your questions…
1. Your understanding is correct!
2. If the input is equal to or exceeds VREFH, the converter circuit converts the signal to 0x7FFF (or 0xFFFF), which is full scale 12-bit single ended (or 13-bit differential) representation. If the input is equal to or less than VREFL, the converter circuit converts it to 0x000. Input voltages between VREFH and VREFL are straight-line linear conversions.
3. You just need to take into account the Table 12. Maximum supply currents from datasheet.
Hope it helps you.
Have a nice day!
Hi @_Leo_
Thank you for your help.
I understand about Question1 and 3.
Regarding 2, I would like to ask whether it is allowed to apply 1.8V to the VREFFH pin when CSCALE is 0b. There is only VREFFH = 1.68V case in the datasheet.
I'd like to apply 1.8V to VREFFH and set CSCALE = 0b when the NVCC_GPIO is 3.3V. Is it no problem?
There is no spec for that because it do not make sense talking about to take advantage of the full conversion scale.