When we are doing a durability test on the CAN send and receive, we had the following hard fault after running the software for several hours:
The Imprecise data bus error bit is set in the BFSR register.
The fault happened randomly after the software has been running for several hours.
We are using NXP MXRT1064
Any clue or suggestion would be appreciated.
Thanks a lot for your help.
Ni
Hello,
I'm having a similar issue, the only difference is that I am starting/stopping a PIT triggered by a rising and falling edge interrupt respectively. Sometimes the code runs fine, sometimes it is slopy and sometimes throws a FAULT.
I tried setting priorities for the 2 interrupts with no effect. I used other pins with no effect. Seems to be a configuration matter, but I can;t put my finger on it. Sampe code below.
BOARD_ConfigMPU();
BOARD_InitBootPins();
BOARD_InitBootClocks();
NVIC_SetPriority(GPIO1_Combined_0_15_IRQn, 0U);//this doesn't solve the issue, although increases consistency
NVIC_SetPriority(GPIO2_Combined_0_15_IRQn, 1U);//this doesn't solve the issue, although increases consistency
BOARD_InitBootPeripherals();