Hi,
I have a question about SRAM interface.
There is a register 24.5.1.2 Module Control Register (MCR).
There is a description WPOL0 WAIT/RDY# polarity for NOR/PSRAM, but there is no WAIT/READY pin in table 24.4.3 Pin Mux in SEMC.
Is it possible to use WAIT/READY for SRAM? if possible, which pin is assigned to WAIT/READY?
Best Regards,
Sugiyama
Hi Toshishisa Sugiyama
Could you clarify what Chip are you using? in the Reference MAnual for the IMXRT1050, in the table 24.4.3 you can find the
SEMC_RDY pin. For SRAM it is the pin A27/CS6
Hope this could help
Have a great day,
TIC
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Hi,
Thank you for your answer.
I'm sorry I missed device name. It is regarding to i.MXRT1050.
Does it means SEMC_RDY pin can be used for NOR/SRAM READY pin?
However, 24.5.1.3 IO Mux Control Register (IOCR) , MUX_RDY is like below. It is assigned Address pin bit 27 NOR/PSRAM not ready pin.
Best Regads,
Sugiyama