I am trying to understand the ROM boot process. I see the IVT table has start addresses in the flash 0x60000000 range. I look at the boot data start and it also has address in flash 0x60000000 range. I then look at the u-boot map file and all addresses are in the flash 0x60000000 range. The XIP fuse setting is at 0. I thought the flash code was supposed to be copied into OCRAM and executed from there but I see no addressing in the OCRAM area. How is this operating? What am I not understanding?
Ok, I guess I may have figured this out myself. From the reference manual section 27.5.15, FlexSPI always supports XIP regardless of flash device if placed in Advanced High Performance Bus (AHB) access mode. In addition, u-boot subsequently copies itself into external RAM (0x80000000) area for better execution performance.