SDO line of LPSPI is logic high always in IMXRT1060 before executing data transfer

[LOKENDERVASHIST]

While using LPSPI module of IMXRT1060 board. I have selected LPSPI4 module and configured the SPI with default pin configuration as present in the example project as show below:

With the above pin configuration I am getting default Logic High on SDO line when we are not transmitting any data i.e., when PCS is deasserted .

I want default logic low on SDO line when PCS is deasserted. Can anyone help with it ?

I have tried using the below pin configuration for SDO line to make it to logic low by using Pull down to 100k and enabling Pull as shown below:

With above configuration as well I cannot see any change on default state of MOSI line.

I have attached data waveform and project as well for reference with default configuration.

Please help with achieving default logic low on SDO line.

[kerryzhou]

Hi @LOKENDERVASHIST ,

   Thank you for your interest in the NXP MIMXRT product, I would provide service for you.

  Please try to modify this bit OUTCFG, check whether any improvement, especially when you sendout data 0.

Any updated information, please kindly let me know.

Best Regards,

Kerry

[LOKENDERVASHIST]

Hello @kerryzhou ,

I have tried by changing the OUTDATACFG field with both data retained as well as tristated , but didn't got default value as logic low on SDO line during PCS deasserted state. 

My requirement is to have logic low on SDO line when PCS is in de asserted state. Please let me know what is the reason for SDO line as logic HIGH by default and what is the way to achieve the above mentioned requirement.

[kerryzhou]

Hi @LOKENDERVASHIST ,

   Thanks for your updated information.

   I already checked the LPSPI IP, and this IP default MOSI(SDO) status is higher, no register to change it from the LPSPI IP method. I also double check with our internal expert, really the IP feature.

   So, a workaround for you, you can configure it to the GPIO, and set the pin output 0, before you want to send the SPI data, you can change the pinmux back to the LPSPI method. This may have a little pulse.

Then, it is related to your slave side, what's the requirement, why it needs the default as low, whether it can accept the small pulse which caused by the GPIO change to the LPSPI pin function.

Wish it helps you!

Best Regards,

Kerry