Hi,
I am using IMXRT1170 board and I want to configure QTMR ISR to hit for every 1 second. I am not able to get the ISR as expected, it is giving in milliseconds. For 1000U as a count to the below API in the code,
(considering the standard 1000milli second = 1sec)
QTMR_SetTimerPeriod(QTMR1_BASEADDR, QTMR1_CHANNEL, MSEC_TO_COUNT(1000U, QTMR1_SOURCE_CLOCK));
This is my code.
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/* QTMR definitions for 1 second ISR */
#define QTMR1_BASEADDR TMR1 //! The QTMR instance used for board
#define QTMR1_CHANNEL kQTMR_Channel_1 //! The QTMR channel used for board
#define QTMR1_IRQ_ID TMR1_IRQn //! Interrupt number for the QTMR instance used
#define OneSecondISR TMR1_IRQHandler //! interrupt handler for the QTMR instance used
/* QTMR Clock source divider for Ipg clock source, the value of two macros below should be aligned. */
#define QTMR1_PRIMARY_SOURCE (kQTMR_ClockDivide_128)
#define QTMR1_CLOCK_SOURCE_DIVIDER (128U)
/* The frequency of the source clock after divided. */
#define QTMR1_SOURCE_CLOCK (CLOCK_GetRootClockFreq(kCLOCK_Root_Bus) / QTMR1_CLOCK_SOURCE_DIVIDER)
#define ONE_SEC_IRQ_PRIORITY (4) //! Set ISR priority
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qtmr_config_t stOneSecqtmr1Config;
QTMR_GetDefaultConfig(&stOneSecqtmr1Config);
stOneSecqtmr1Config.primarySource = QTMR1_PRIMARY_SOURCE;
QTMR_Init(QTMR1_BASEADDR, QTMR1_CHANNEL, &stOneSecqtmr1Config);
/* Set timer period to be 1 second */
QTMR_SetTimerPeriod(QTMR1_BASEADDR, QTMR1_CHANNEL, MSEC_TO_COUNT(1000U, QTMR1_SOURCE_CLOCK));
/* set priority of timer */
NVIC_SetPriority(TMR1_IRQn,ONE_SEC_IRQ_PRIORITY);
/* Enable at the NVIC */
EnableIRQ(QTMR1_IRQ_ID);
/* Enable timer compare interrupt */
QTMR_EnableInterrupts(QTMR1_BASEADDR, QTMR1_CHANNEL, kQTMR_CompareInterruptEnable);
/* Start the second channel to count on rising edge of the primary source clock */
QTMR_StartTimer(QTMR1_BASEADDR, QTMR1_CHANNEL, kQTMR_PriSrcRiseEdge);
________________________________________________________________________
Please let me know how to configure it for 1second.
Thanks in advance.
已解决! 转到解答。
Hello @Naveed,
i.MX RT1170 Processor Reference Manual. Chapter 76. Quad Timer (TMR). Section 76.2.2. Features. mentions that each counter/timer is 16-bit. This indicates the maximum timer frequency/period that you could obtain is 0xFFFF. If you are using the Primary source of the quad timer as Bus clock divided by 128 that is equivalent to almost 35ms and 28Hz.
So, for obtaining a second, you might want to use two quad timers in chain/cascaded mode. One of them would work as you already configure it with Counting Mode as Rising edges of primary source, and Primary timer/counter source as Bus clock divided by 128. While the second quad timer should be set as Cascaded count mode using the counter output from the other quad timer you've already set. A similar implementation could be found in the qtmr_timer in the MIMXRT1170's SDK example.
Best regards, Raul.
Hello @Naveed,
i.MX RT1170 Processor Reference Manual. Chapter 76. Quad Timer (TMR). Section 76.2.2. Features. mentions that each counter/timer is 16-bit. This indicates the maximum timer frequency/period that you could obtain is 0xFFFF. If you are using the Primary source of the quad timer as Bus clock divided by 128 that is equivalent to almost 35ms and 28Hz.
So, for obtaining a second, you might want to use two quad timers in chain/cascaded mode. One of them would work as you already configure it with Counting Mode as Rising edges of primary source, and Primary timer/counter source as Bus clock divided by 128. While the second quad timer should be set as Cascaded count mode using the counter output from the other quad timer you've already set. A similar implementation could be found in the qtmr_timer in the MIMXRT1170's SDK example.
Best regards, Raul.