I'm using the MIMXRT1060-EVKB evaluation board, so the CPU being used is MIMXRT1062DVL6B.
So I expect the on chip SRAM to be 1 Mbyte or 0x100000
I'm also using MCUXpresso to develop code...
I have a program that instantiates a large uint8_t (byte) array.
The program works when using the "default" IDE settings (Execute out of SDRAM).
The program has a loop that marches through this large array.
However, my target application wants to execute out of ITCM and use DTCM for data.
I modified the MCU settings (C/C++ Build -> MCU settings) to have the following TCM regions:
SRAM_ITC Start at: 0x2000 Size: 0x3E000
SRAM_DTC Start at: 0x20000000 Size: 0x80000
SRAM_OC Start at: 0x20200000 Size: 0x40000
SRAM_ITC_RESERVE Start at: 0x0 Size: 0x2000
So the sum of all of the SRAM sections is 0x100000
I also changed C/C++ Build -> Settings -> MCU Linker -> Managed Linker Settings
Checked the "Link application to RAM"
Heap in SRAM_OC Region
Stack in SRAM_DTC Region (Location Start)
and added an extra-linker script input section:
*(.bss*) SRAM_DTC
When I build, everything links as expected.
When I run the TCM version, things start as expected, but the code "hangs" (no exceptions invoked).
Further debugging shows that when the DTCM accesses cross over the boundary between 0x2001feff to 0x20020800 (crossing over the 0x2001ffff to 0x20020000 boundary, accesses to DTCM fail.
Is there something else I need to do to "configure" the memory arrangement (beyond the setup in MCU settings)?
I also tried changing the "extra" linker statement to point all .bss to SDRAM ( *(.bss*) BOARD_SDRAM ) and the program ran as expected... So the execution from ITCM seems to work. But accessing beyond 0x2001ffff seems to cause a problem.
Suggestions?
Thanks!
Solved! Go to Solution.
I now realize that filling out the memory configuration in MCU settings doesn't create the code to actually configure the I/D TCM. So modifications need to be made in "start_mimxrt1062.c" to configure the SRAM banks... (And since the system is running from ITCM from boot, the bank loaded via the "default" fuse settings needs to stay the same...)
It appears that changing MCU settings (in particular the memory configuration) doesn't update board.c
This is where the MPU (memory protection unit) gets set up. It looks like the DTCM region is limited here to 128K bytes...
Is there a configuration area that should be modified to change the contents of board.c? Or is it expected that board.c be edited manually?
I modified the MPU setup in "board.c" to reflect the sizes of ITCM, DTCM, and OC_SRAM.
It didn't seem to make a difference. I still get a bus fault when accessing DTCM beyond the 128K boundary.
Suggestions?
I now realize that filling out the memory configuration in MCU settings doesn't create the code to actually configure the I/D TCM. So modifications need to be made in "start_mimxrt1062.c" to configure the SRAM banks... (And since the system is running from ITCM from boot, the bank loaded via the "default" fuse settings needs to stay the same...)
An update...
Further debugging shows that a fault was taken (but the code then loops)...
Here is the Memory Configuration in MCUXpresso:
Here is the Linker configuration:
Here is the Bus Fault report:
It can be seen that the fault occurs when attempting to access 0x20020800. This address should be within the range of DTCM... It almost appears that the system thinks that DTCM is only 128K bytes in length.
My assumption is that I only need to edit these tables (Memory configuration, linker configuration, etc.) and then do a project "clean" and a project "build". Are there other steps that I missed?
Did I configure something improperly?
Thanks...