Using two MIMXRT1170-EVKB running MIMXRT1170-EVKB-lpspi_edma_b2b_transfer_master_cm7 in one and MIMXRT1170-EVKB-lpspi_edma_b2b_transfer_slave_cm7 running in the other. These examples running on IAR are just supposed to mirror the master's data back from the slave. The connections are below:
Pin Name | Board Location | Pin Name | Board Location |
SOUT | J10 pin 8 | SIN | J10 pin 10 |
SIN | J10 pin 10 | SOUT | J10 pin 8 |
SCLK | J10 pin 12 | SCLK | J10 pin 12 |
PSC0 | J10 pin 6 | PSC0 | J10 pin 6 |
GND | J10 pin 14 | GND | J10 pin 14 |
The SPI signals show little to no communication back from the slave.
Is there some other troubleshooting that we might be missed?
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Hi @MichaelC_Future ,
The SPI demo works as expected with the connections detailed in readme file. So, the issue is just HW. And remember that EVK are for evaluation purposes they are not the best for field applications. So please follow readme instructions for such demo.
On the other hand, I have consulted the Hardware Design Guide and there is no guidance about SPI layout. But being a generic interface, we could consult web resources like the following link:
Tips for Optimal High Speed SPI Layout Routing
Tips for Optimal High Speed SPI Layout Routing | Advanced PCB Design Blog | Cadence
In this post we can see that using test points do not match with the SPI Layout Routing Tips, like keep all SPI layout traces the same length, among others.
Regarding the differences between LPSPI, SPI, and Flexcomm SPI, please help me creating a new ticket/post to keep a better track of Q&A.
Hope it helps you!
Hi Pablo,
What tools are you using IAR, Keil, or MCUXpresso? What version of SDK are you using to generate the MIMXRT1170-EVKB-lpspi_edma_b2b_transfer_master/slave_cm7 example?
Several tests to try and isolate the problem with the MIMXRT1170-EVKB boards.
I am using MCUXpresso IDE with SDK version 2.15.100. I am requesting a IAR license so please give me more time to test with IAR environment. I am almost sure that results will be equal.
Meanwhile could you please try with MCUXpresso and SDK 2.15.100 in order to see is your EVKs are damage please?
Also, could you please check continuity in the SPI signals from MCU pads to Arduino interface and from board to board please?
Please let me know your results.
I test the same example using two MIMXRT1170-EVKB and it works for me.
I see that you follow the hardware requirements (from readme file) removing the 0Ω resistors R200, R404, R406, R2016, R2097.
Could you please help me trying again but swapping the master and slave? This in order to see if your slave board is damage.
Please let me know your results.
Hi Pablo,
Thank you for your continued support. Please see below follow up to your requests.
Some new information popped up with customer. See below.
Hi @MichaelC_Future ,
Most likely the issue will be fix with the new hardware, in the worst case you need to test with new EVK's
Please let me know your results.
Hi Pablo,
I think the issue is tied to length of GND wire between the two boards. A shorter GND wire was used between the original two GND point connections and the example worked. Knowing SPI is usually considered "low speed" communications, what is the difference between LPSPI, SPI, and Flexcomm SPI that might show this issue?
Hi Pablo,
My customer moved the GND connection between the two boards from TP39/TP27 to a different GND point (J10.14). This seemed to clear up the issue and now he has MOSI/MISO communication between the two boards as expected. I took a look at the layout .pdfs and could find no real differences between the TP and the header GND. What do you make of this?
What we know is that test points are for evaluations proposes and they are not the best for field applications. But give me more time to consult with my team.
Thanks in advance for your patient.
Hi @Pablo_Ramos,
I think the GND difference ended up being a non-issue. I think the issue is tied to length of GND wire between the two boards. A shorter GND wire was used between the original two GND point connections and the example worked. Knowing SPI is usually considered "low speed" communications, what is the difference between LPSPI, SPI, and Flexcomm SPI that might show this issue?
Hi @MichaelC_Future ,
The SPI demo works as expected with the connections detailed in readme file. So, the issue is just HW. And remember that EVK are for evaluation purposes they are not the best for field applications. So please follow readme instructions for such demo.
On the other hand, I have consulted the Hardware Design Guide and there is no guidance about SPI layout. But being a generic interface, we could consult web resources like the following link:
Tips for Optimal High Speed SPI Layout Routing
Tips for Optimal High Speed SPI Layout Routing | Advanced PCB Design Blog | Cadence
In this post we can see that using test points do not match with the SPI Layout Routing Tips, like keep all SPI layout traces the same length, among others.
Regarding the differences between LPSPI, SPI, and Flexcomm SPI, please help me creating a new ticket/post to keep a better track of Q&A.
Hope it helps you!