MIMXRT1170-EVKB lpspi DMA Example MISO Issues

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MIMXRT1170-EVKB lpspi DMA Example MISO Issues

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MichaelC_Future
Contributor II

Using two MIMXRT1170-EVKB running MIMXRT1170-EVKB-lpspi_edma_b2b_transfer_master_cm7 in one and MIMXRT1170-EVKB-lpspi_edma_b2b_transfer_slave_cm7 running in the other. These examples running on IAR are just supposed to mirror the master's data back from the slave. The connections are below:

Pin Name

Board Location

Pin Name

Board Location

SOUT 

J10 pin 8

SIN

J10 pin 10 

SIN

J10 pin 10 

SOUT

J10 pin 8

SCLK

J10 pin 12 

SCLK

J10 pin 12

PSC0

J10 pin 6

PSC0

J10 pin 6 

GND

J10 pin 14

GND

J10 pin 14

 

The SPI signals show little to no communication back from the slave.

SPI_Data.png

 

Is there some other troubleshooting that we might be missed?

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Pablo_Ramos
NXP Employee
NXP Employee

Hi @MichaelC_Future ,

The SPI demo works as expected with the connections detailed in readme file. So, the issue is just HW. And remember that EVK are for evaluation purposes they are not the best for field applications. So please follow readme instructions for such demo.

On the other hand, I have consulted the Hardware Design Guide and there is no guidance about SPI layout. But being a generic interface, we could consult web resources like the following link:

Tips for Optimal High Speed SPI Layout Routing
Tips for Optimal High Speed SPI Layout Routing | Advanced PCB Design Blog | Cadence


In this post we can see that using test points do not match with the SPI Layout Routing Tips, like keep all SPI layout traces the same length, among others.

Regarding the differences between LPSPI, SPI, and Flexcomm SPI, please help me creating a new ticket/post to keep a better track of Q&A.

Hope it helps you!

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MichaelC_Future
Contributor II

Hi Pablo,

What tools are you using IAR, Keil, or MCUXpresso? What version of SDK are you using to generate the MIMXRT1170-EVKB-lpspi_edma_b2b_transfer_master/slave_cm7 example?

Several tests to try and isolate the problem with the MIMXRT1170-EVKB boards.

  1. Repeated the initial test with the MIMXRT1170-EVKB boards and the slave board terminal displayed junk every time.
  2. Swapped the MIMXRT1170-EVKB board programs and the slave board displayed junk again every time.
  3. Used one of the MIMXRT1170-EVKB as a master connected to MIMXRT1050-EVK as a slave. The MIMXRT1050-EVK received the data correctly. The MIMXRT1050-EVK did not return the data to the MIMXRT1170-EVKB (Did not investigate this issue)
  1. Used the second MIMXRT1170-EVKB as a master connected to RT1050 as a slave. The MIMXRT1050-EVK received the data correctly. The MIMXRT1050-EVK did not return the data to the MIMXRT1170-EVKB (Did not investigate this issue)
  1. Reversed the programs of the MIMXRT1170-EVKB and MIMXRT1050-EVK, so the MIMXRT1050-EVK was the master.
  2. Tried both MIMXRT1170-EVKB's and both displayed junk data on the terminal.

 

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Pablo_Ramos
NXP Employee
NXP Employee

I am using MCUXpresso IDE with SDK version 2.15.100. I am requesting a IAR license so please give me more time to test with IAR environment. I am almost sure that results will be equal.

Meanwhile could you please try with MCUXpresso and SDK 2.15.100 in order to see is your EVKs are damage please?

Also, could you please check continuity in the SPI signals from MCU pads to Arduino interface and from board to board please?

Please let me know your results.

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Pablo_Ramos
NXP Employee
NXP Employee

Hi @MichaelC_Future 

I test the same example using two MIMXRT1170-EVKB and it works for me.

Pablo_Ramos_0-1715728040850.png

 

Pablo_Ramos_1-1715728047738.png

 

I see that you follow the hardware requirements (from readme file) removing the 0Ω resistors R200, R404, R406, R2016, R2097.

Could you please help me trying again but swapping the master and slave? This in order to see if your slave board is damage.

Please let me know your results.

 

 

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MichaelC_Future
Contributor II

Hi Pablo,

Thank you for your continued support. Please see below follow up to your requests.

  • Verified all SPI connections to header and resistor DNP locations
  • Tried LPSPI DMA SPI with MCUXpresso and SDK 2.15.100, reversed the boards, same result junk data is read
  • Tried LPSPI Interrupt SPI with MCUXpresso and SDK 2.15.100, reversed the boards, same result junk data is read
  • Installed the I2C DMA projects for the RT1170EVKB and they work as expected.

Some new information popped up with customer. See below.

  • Three weeks ago when the SPI work started, U27 was removed (both boards) thinking it would be easier than removing the resistors.
  • Removing U27 leaves the SDI/SDO lines floating at that location.  
  • The resistors were also removed, so removing U27 was unnecessary.
  • U27 has been reinstalled on both boards, it's possible that U27 is now defective. If it is defective, it could affect the SDI/SDO signals.
  • New parts are on order to replace U27 on both boards.
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Pablo_Ramos
NXP Employee
NXP Employee

Hi @MichaelC_Future ,
Most likely the issue will be fix with the new hardware, in the worst case you need to test with new EVK's

Please let me know your results.

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MichaelC_Future
Contributor II

Hi Pablo,

I think the issue is tied to length of GND wire between the two boards. A shorter GND wire was used between the original two GND point connections and the example worked. Knowing SPI is usually considered "low speed" communications, what is the difference between LPSPI, SPI, and Flexcomm SPI that might show this issue?

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MichaelC_Future
Contributor II

Hi Pablo,

My customer moved the GND connection between the two boards from TP39/TP27 to a different GND point (J10.14). This seemed to clear up the issue and now he has MOSI/MISO communication between the two boards as expected. I took a look at the layout .pdfs and could find no real differences between the TP and the header GND. What do you make of this?

MichaelC_Future_1-1716495762569.png

 

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Pablo_Ramos
NXP Employee
NXP Employee

Hi @MichaelC_Future 

What we know is that test points are for evaluations proposes and they are not the best for field applications. But give me more time to consult with my team.

Thanks in advance for your patient.

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MichaelC_Future
Contributor II

Hi @Pablo_Ramos,

I think the GND difference ended up being a non-issue. I think the issue is tied to length of GND wire between the two boards. A shorter GND wire was used between the original two GND point connections and the example worked. Knowing SPI is usually considered "low speed" communications, what is the difference between LPSPI, SPI, and Flexcomm SPI that might show this issue?

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Pablo_Ramos
NXP Employee
NXP Employee

Hi @MichaelC_Future ,

The SPI demo works as expected with the connections detailed in readme file. So, the issue is just HW. And remember that EVK are for evaluation purposes they are not the best for field applications. So please follow readme instructions for such demo.

On the other hand, I have consulted the Hardware Design Guide and there is no guidance about SPI layout. But being a generic interface, we could consult web resources like the following link:

Tips for Optimal High Speed SPI Layout Routing
Tips for Optimal High Speed SPI Layout Routing | Advanced PCB Design Blog | Cadence


In this post we can see that using test points do not match with the SPI Layout Routing Tips, like keep all SPI layout traces the same length, among others.

Regarding the differences between LPSPI, SPI, and Flexcomm SPI, please help me creating a new ticket/post to keep a better track of Q&A.

Hope it helps you!