Hardware: MIMXRT1060-EVK.
I used modifed evkmimxrt1060_gpt_timer example (MCUXpresso IDE v10.3.0) to get coremark score.
CPU clock is changed to 528MHz. Got following results:
Executed from | Address | Coremark score | Optimization |
OCRAM (BOARD_SDRAM) | 0x20200000 | 2127 | O3 |
ITCM | 0 | 2069 | O3 |
DTCM | 0x20000000 | 2083 | O3 |
SDRAM | 0x80000000 | 2143 | O3 |
SDRAM | 0x80000000 | 425 | O0 |
SDRAM | 0x80000000 | 1515 | O1 |
SDRAM | 0x80000000 | 1515 | O2 |
FlexSPI/ QSPI flash (BOARD_FLASH) Advanced High-performance Bus? | 0x60000000 | 2149 | O3 |
For everything but SDRAM CMSIS-DAP was used, and for SDRAM - a J-LInk
probe with evkmimxrt1060_sdram_init.jlinkscript (with defined SKIP_SYSCLK_INIT).
A few questions/observations based on the table above:
- the scores are way below 3000 even for the reduced clock frequency
- is it really possible to execute code from DTCM?
- why QSPI flash produces the best performance?
- why TCM performance is worse than SDRAM?
You can refer to my coremark project for RTs
cortex-m-apps/apps at master · JayHeng/cortex-m-apps · GitHub
- RT1020 Coremark score - ITCM:
CoreMark 1.0 : 2514.968510 / IAR EWARM v7.80.4 High - Speed - No size constraints / STACK
CoreMark 1.0 : 2460.495287 / IAR EWARM v8.20.2 High - Speed - No size constraints / STACK
- RT1050 Coremark score - ITCM:
CoreMark 1.0 : 3017.962213 / IAR EWARM v7.80.4 High - Speed - No size constraints / STACK
CoreMark 1.0 : 2952.594345 / IAR EWARM v8.20.2 High - Speed - No size constraints / STACK
Thank you. Unfortunately I don't have access to the IAR IDE. It may be a compiler issue (I presume you're using optimization as well). I'm hoping NXP will answer all my questions.
Ilya
Hi llya Kogan,
Please download the IAR IDE from this website:
Then follow Jay's recommended code, and test it on your side.
Have a great day,
Kerry
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