Linker error L6244E when including USB code in i.MXRT1176 project

[carstengroen]

During porting of some code from i.MX1164 to i.MXRT1176, I have stumbled on a problem I could use some help on....

The project is done in Keil!

The (reduced) project implements USB (Bulk, not important). When I enable a specific piece of code, I get the L6244E error, the code (in usb_device_dci.c):

#if ((defined(USB_DEVICE_CONFIG_EHCI)) && (USB_DEVICE_CONFIG_EHCI > 0U))
/* EHCI device driver interface */
static const usb_device_controller_interface_struct_t s_UsbDeviceEhciInterface = {
    USB_DeviceEhciInit, USB_DeviceEhciDeinit, USB_DeviceEhciSend,
    USB_DeviceEhciRecv, USB_DeviceEhciCancel, USB_DeviceEhciControl};
#endif

The linker file:

#if (defined(__ram_vector_table__))
  #define __ram_vector_table_size__    0x00000400
#else
  #define __ram_vector_table_size__    0x00000000
#endif

#define m_flash_config_start           0x30000400
#define m_flash_config_size            0x00000C00

#define m_ivt_start                    0x30001000
#define m_ivt_size                     0x00001000

#define m_interrupts_start             0x30002000
#define m_interrupts_size              0x00000400

#define m_text_start                   0x30002400
#define m_text_size                    0x00FBDC00

#define m_qacode_start                 0x00000000
#define m_qacode_size                  0x00040000

#define m_interrupts_ram_start         0x20000000
#define m_interrupts_ram_size          __ram_vector_table_size__

#define m_data_start                   (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size                    (0x00040000 - m_interrupts_ram_size)

#if (defined(__use_shmem__))
  #define m_rpmsg_sh_mem_start         0x202C0000
  #define m_rpmsg_sh_mem_size          0x00002000

  #define m_data2_start                0x202C2000
  #define m_data2_size                 0x0007E000
#else
  #define m_data2_start                0x202C0000
  #define m_data2_size                 0x00080000
#endif

#define m_core1_image_start            0x30FC0000
#define m_core1_image_size             0x00040000

/* Sizes */
#if (defined(__stack_size__))
  #define Stack_Size                   __stack_size__
#else
  #define Stack_Size                   0x2000
#endif

#if (defined(__heap_size__))
  #define Heap_Size                    __heap_size__
#else
  #define Heap_Size                    0x2000
#endif

#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
LR_m_text m_flash_config_start m_text_start+m_text_size-m_flash_config_start {   ; load region size_region

  RW_m_config_text m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
    * (.boot_hdr.conf, +FIRST)
  }

  RW_m_ivt_text m_ivt_start FIXED m_ivt_size { ; load address = execution address
    * (.boot_hdr.ivt, +FIRST)
    * (.boot_hdr.boot_data)
    * (.boot_hdr.dcd_data)
  }
#else
LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start {   ; load region size_region
#endif
  VECTOR_ROM m_interrupts_start FIXED m_interrupts_size { ; load address = execution address
    * (.isr_vector,+FIRST)
  }
  ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
    * (InRoot$$Sections)
    .ANY (+RO)
  }
#if (defined(__ram_vector_table__))
  VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
  }
#else
  VECTOR_RAM m_interrupts_start EMPTY 0 {
  }
#endif
  RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
    .ANY (+RW +ZI)
    * (RamFunction)
    * (NonCacheable.init)
    * (*NonCacheable)
  }
  ARM_LIB_HEAP +0 EMPTY Heap_Size {    ; Heap region growing up
  }
  ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
  }
#if (defined(__use_shmem__))
  RW_m_ncache m_rpmsg_sh_mem_start EMPTY 0 {
  }
  RPMSG_SH_MEM m_rpmsg_sh_mem_start UNINIT m_rpmsg_sh_mem_size { ; Shared memory used by RPMSG
    * (rpmsg_sh_mem_section)
  }
  RW_m_ncache_unused m_rpmsg_sh_mem_start+m_rpmsg_sh_mem_size EMPTY 0 { ; Empty region added for MPU configuration
  }
#else
  RW_m_ram_text m_qacode_start m_qacode_size { ;
    * (CodeQuickAccess)
  }
  RW_m_ncache m_data2_start EMPTY 0 {
  }
  RW_m_ncache_unused +0 EMPTY m_data2_size-ImageLength(RW_m_ncache) { ; Empty region added for MPU configuration
  }
#endif
}

LR_CORE1_IMAGE m_core1_image_start {
  CORE1_REGION m_core1_image_start m_core1_image_size {
    *(*core1_code)
  }
}

The specific error from the linker:

flexspi_nor_debug\Application.out: Error: L6244E: Load region LR_m_text address (0x30000400) not aligned on a 2048 byte boundary.

If I specifically change in the linker file:

#define m_flash_config_start 0x30000400

to 

#define m_flash_config_start 0x30000800

The error goes away, but the code will (obviously) not work as the address is wrong.

What am I missing in this ???

[EdwinHz]

Hi @carstengroen,

It is hard to say. I believe this error is from the ARM compiler toolchain, so I would highly recommend you to go to their forums for a better support. 

BR,
Edwin.

[carstengroen]

Yes, this is ARM compiler chain.

Also asked the question on Keil forum, so far no solution. I was just hoping that someone here did experience the same problem.

(I have the code running by using --legacyalign in linker settings, but this is deprecated so not a future proof solution)