Dear support
I try to use LPUART_WriteBlocking() function to send some data out, but it hand in the status register check - the transfer empty flag in status register TDRE is 0, means full. I have checked the register before calling this function, and it is 1, not as soon as I call it, it hangs there forever, before this it is able to receive something, and it is the first time I call the function, could you help please?
Regards!
Ping
解決済! 解決策の投稿を見る。
Hi @ping1 ,
When the transmit FIFO is enabled, TDRE is set when the number of datawords in the transmit FIFO is
equal to or less than the number indicated by WATER[TXWATER]. It is controlled by hardware of course. If it is always 0, that means the data in FIFO isn't sent. Can you see something on TX line?
Regards,
Jing
Hi @ping1 ,
Please refer to the lpuart_interrupt demo in SDK. It use LPUART_WriteBlocking() too.
Regards,
Jing
Thanks for reply, Jing
Just wonder why it is blocked by the status flag - is it caused by hardware?
Ping
Hi @ping1 ,
When the transmit FIFO is enabled, TDRE is set when the number of datawords in the transmit FIFO is
equal to or less than the number indicated by WATER[TXWATER]. It is controlled by hardware of course. If it is always 0, that means the data in FIFO isn't sent. Can you see something on TX line?
Regards,
Jing