I am using IMXRT 1171, Cortex M7 processor.
To clarify, I would like to implement one function that starts the transfer and have another function continue and complete the transfer.
Here is an example:
The user passes a buffer and asks SPI memory to space to be read. Read back data should be placed in the buffer. The buffer is allocated just enough to hold the memory read, no space for any overhead.
The read implementation needs to
1. Setup memory device pointer (function 1) within the target SPI memory read device. CS must be held low.
2. Perform the actual read of memory (function 2). Continue to read and complete read.
The issue I have is that SPI master read function does an atomic read where step 1 and 2 is performed in one step using CONT and CONTC bits. This means a second buffer is needed to hold both "setup data" and "read data". I would like to avoid the second second buffer and do an optimal read.
Can this be done with current drivers?