IMXRT1050 SWD connection repeats CPU halt

[audio]

Hello,

I made a custom iMXRT1050 board very similar to i.MX RT1050-EVKB board. I have checked all the power supplies and clocks and they were all good.

When I tried connecting to EV board with J link, everything works. But, when I try to connect to my custom board, it gives me an error like below.

My VTref is right on 3.3V target, so I'm not sure what's causing this problem. 

I saw a similar post here, but there's no problem with my SWD VDD Pin.

RTC CLK

XTAL

[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
I think I need to get more information prior to figuring the issue out, so I need you to clarify the below inquires.
1) Does the issue happen on multiple boards?
2) Is the flashloader tool able to contact the target board after forcing the RT1060 to enter the Serial Download mode?
Have a great day,
TIC

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[audio]

Hi jeremy,

Thanks for the feedback. I have checked several boards and they all behaved the same. So, I don't think this is a manufacturing problem, but rather a design problem.

Sharing more details, please check the attached Schematic of i.MXRT1050 of my board. I'm completely new to the iMXRT1050 and I tried to make my board as similar as EVB as possible.

I'm currently not using any flash memory. I'm just using the same SDRAM that was used in the EVB. And you can see in the attachment, I don't think I can force the RT1050 to go to the serial download mode, since there's no adjustable boot mode selection pin available.I didn't know about using HW boot mode selection, so it's not ready on our board.

Is there anything I can try with the current schematic?

[jeremyzhou]

Hi,
According to the schematic of your board, we can't get an overview of the power-up sequence, and I guess that the issue is related to the power-up sequence, as RT1xxx needs to follow the power-up sequence restrictions which is illustrated below.

So please check it.

Have a great day.

TIC

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[audio]

Hi Jeremy,

I checked the power sequences today and the SNVS supply is turned on at the beginning

Por B pin is held low for 10ms and the rest of the power comes on in between.

Is there a timing graph or table for each power supply? I wanted to check if there were any specific delay times for each power supply, but I couldn't find any in the RM.

I also read that pulling up JTAG_MOD pin high can cause trouble for SWD connection, so I removed my pull-up resistor on the GPIO_AD_B0_08 pin, but it didn't make any changes.

[jeremyzhou · Accepted solution]

Hi,
Thanks for your reply.
1)Is there a timing graph or table for each power supply?
-- Please check the below figure.

Hope this is clear.
Have a great day,
TIC

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[audio]

Hi Jeremy,

Thank you so much for your help. I got JLink to connect to my board after delaying VDD_High_IN power up just a little. I thought VDD_SNVS and VDD_High timing could be the same because the datasheet said that VDD_SNVS can be shorted to VDD_High.

Anyway now it works, while VTref value seems to be little low though.