Hi,
We are looking into the performance of HyperRAM on the MIMXRT1180-EVK board. For this we have written a small application that performs some basic read and write operations from/to HyperRAM, for both sequential and random accesses and with cache enabled/disabled. Code is running from QuadSPI flash and HyperRAM is configured to run at 166 MHz (DDR).
To optimize data transfer, we have followed the application note AN12239 which was made for the MIMXRT1050-EVKB. This recommends to:
When running the tests with cache enabled and sequential data access, we have a read performance of 220 MB/s and write performance of 80 MB/s. With cache disabled, this becomes 100 MB/s for read and 50 MB/s for write. The write performance is thus much lower than mentioned in the application note.
My questions are:
Thank you for the information.
Tristan
Hi @TristanV,
As the i.MX RT1180 is still in preproduction, I'm afraid we do not have the information available for this device. I would highly advice you contact your NXP representative for more information about the preproduction device MIMXRT1180-EVK.
BR,
Edwin.
Thank you for your answer.
Questions (2) and (3) were not specific for the i.MXRT1180, but more general for the FlexSPI interface. Could you have information about this, e.g. for the i.MXRT117x?
Are you still able to clarify question (1), this is from an application note for the MIMXRT1050-EVKB?