How can I initialize HyperRAM connecting to FlexSPI1

[Vinos]

Chip:RT1176

IDE:MCUXPresso IDE

FlexSPI2 is connected to NOR Flash,and FlexSPI1 is connected to HyperRAM on my board.

Do you have DCD configuration example for hyperRAM please?

--------

Chapter 10.8.2.3 in reference manual mentions XMCD could configure HyperRAM .

So I add the `xmcd` component,and change the xmcd_data array as below:

const uint32_t xmcd_data[] = {
    0xC0000008,
	0xC0000700
};

But it doesn't work.

I find that the section `__attribute__((section(".boot_hdr.xmcd_data"), used))` declared in xmcd.c is not defined in evkbmimxrt1170_freertos_hello_cm7_Debug.ld.

The reference manual saids "The XMCD header resides at the fixed offset 0x40 from the IVT header",so I change evkbmimxrt1170_freertos_hello_cm7_Debug.ld manually as below:

    .boot_hdr : ALIGN(4)
    {
        FILL(0xff)
		. = 0x40 ;
		KEEP(*(.boot_hdr.xmcd_data))
        . = 0x400 ;
        __boot_hdr_start__ = ABSOLUTE(.) ;
        KEEP(*(.boot_hdr.conf))
        . = 0x1000 ;
        __boot_hdr_ivt_loadaddr__  =  ABSOLUTE(.) ;
        KEEP(*(.boot_hdr.ivt))
        . = 0x1020 ;
        __boot_hdr_boot_data_loadaddr__ = ABSOLUTE(.) ;
        KEEP(*(.boot_hdr.boot_data))
        . = 0x1030 ;
        __boot_hdr_dcd_loadaddr__ = ABSOLUTE(.) ;
        KEEP(*(.boot_hdr.dcd_data))
        __boot_hdr_end__ = ABSOLUTE(.) ;
        . = 0x2000 ;
    } >BOARD_FLASH

But the hyperRAM also doesn't work.

How can I initialize the hyperRAM?

Thanks

[Vinos]

The system can't boot from flash when I fill the 0x1040 region with XMCD.

Now I try to configure hyperRAM in the program.Here is the code.

[trevorholmes]

Initializing HyperRAM and connecting it to FlexSPI1 involves a few steps. The exact implementation may vary depending on the specific microcontroller or development board you are using. However, I can provide you with a general outline of the process:

1. Configure the FlexSPI1 Controller: First, you need to configure the FlexSPI1 controller on your microcontroller. This typically involves setting up the necessary pins, clock configuration, and control registers. Consult the reference manual or datasheet of your microcontroller for specific instructions on configuring the FlexSPI1 controller.

2. Configure HyperRAM Mode: HyperRAM can operate in different modes, such as Octal SPI, Quad SPI, or HyperBus mode. Determine the mode supported by your HyperRAM and configure the FlexSPI1 controller to operate in that mode. This includes setting the appropriate command and data protocols, addressing mode, and timing parameters.

3. Initialize the FlexSPI1 Controller: Initialize the FlexSPI1 controller by setting up its control registers, clock configuration, and command settings. This typically involves configuring registers such as MCR0 (Module Control Register 0), MCR1 (Module Control Register 1), IPCR0 (IP Control Register 0), IPCR1 (IP Control Register 1), and others. Refer to the microcontroller's reference manual for the specific registers and configurations required.

4. Configure HyperRAM Parameters: Configure the HyperRAM parameters, such as the number of address bytes, data bus width, burst length, and timing requirements. These parameters should match the specifications of your HyperRAM device. Refer to the HyperRAM datasheet or technical documentation for the correct values and timing diagrams.

5. Enable FlexSPI1 Interrupts (Optional): If you want to utilize interrupts for data transfer or status handling, enable the relevant interrupts for FlexSPI1. This allows your microcontroller to receive interrupts when specific events occur, such as completion of data transfers or errors.

6.  

[Vinos]

Please don't reply using ChatGPT.

[jingpan]

Hi @Vinos ,

"The XMCD header resides at the fixed offset 0x40 from the IVT header".

IVT is start from 0x1000. So, XMCD is at 0x1040. That means if you have DCD, you can't have XMCD.

Regards,

Jing

[Vinos]

I have tried linking the xmcd to 0x1040 and also doesn't work.

Pin config is as same as the reference manual mentions below:

Link script:

It seems MCUXpresso IDE won't change the link script if I set `XIP_BOOT_HEADER_DCD_ENABLE=0` and `XIP_BOOT_HEADER_XMCD_ENABLE=1`.I have to change it manually.

.boot_hdr : ALIGN(4)
{
	FILL(0xff)
	. = 0x400 ;
	__boot_hdr_start__ = ABSOLUTE(.) ;
	KEEP(*(.boot_hdr.conf))
	. = 0x1000 ;
	__boot_hdr_ivt_loadaddr__  =  ABSOLUTE(.) ;
	KEEP(*(.boot_hdr.ivt))
	. = 0x1020 ;
	__boot_hdr_boot_data_loadaddr__ = ABSOLUTE(.) ;
	KEEP(*(.boot_hdr.boot_data))
	. = 0x1030 ;
	__boot_hdr_dcd_loadaddr__ = ABSOLUTE(.) ;
	. = 0x1040 ;
	KEEP(*(.boot_hdr.xmcd_data))
	__boot_hdr_end__ = ABSOLUTE(.) ;
	. = 0x2000 ;
} >BOARD_FLASH

 binary:

MPU:

MPU->RBAR = ARM_MPU_RBAR(2, 0x30000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_64MB);

Testify:

uint32_t *hyperram = (uint32_t *)(0x30000000U);

hyperram[0] = 0x12345678;

if(hyperram[0] == 0x12345678) PRINTF("PASS");

Anything else I should pay attention to?

Thanks

[jingpan]

Hi @Vinos ,

Here is a demo shows the correct XMCD address.

https://community.nxp.com/t5/i-MX-RT/XMCD-setting-sample-program/td-p/1420419

I can't find a hyperRAM demo. What is your HyperRAM? I guess there is configuration problem.

Regards,

Jing

[Vinos]

I've seen that post,but that's SEMC interface for SDRAM.

This is the reference manual:

const uint32_t xmcd_data[] = {
0xC000000C,  //[4:0] means 2 option
0xC0000700,
0x00110000,  //or 0x10110000 both doesn't work
};

Or do you have hyperram(FlexSPI1 NOR/NAND Secondary Pin Group) initilizing code please?I've no idea to initialize hyperram through this interface.

[jingpan]

Hi @Vinos ,

Can the application boot from flash if not use XMCD? 

Regards,

Jing

[Vinos]

Yes,NOR flash in FlexSPI2 works.

The program won't run after reset if I fill the XMCD region in 0x1040,instead,rom bootloader goes to serial downloader mode.I didn't find the reason.

But I think this ISIS hyperRAM should be initialized by XMCD through its "Full Configuration Block" mode(fill the LUT table myself) instead of "Simplified Configuration Option Block".

Now I'm testing initializing hyperRAM through code,and finally read out the vendor id successfully just now,but read/write timing may be wrong.I'll have more tries.

I'll try initializing through XMCD If it works.

Thanks.

[jingpan]

Hi @Vinos ,

I guess XMCD cause the system jumping to serial download mode is because some badly fault happened and the system is reset.

Yes, it's better to test on flexspi driver example first. You can try to slow down clock speed under 60Mhz.

Regards,

Jing

[jingpan · Accepted solution]

Hi @Vinos ,

Have you read AN12239.pdf for how to config hyperRAM?

Regards,

[Vinos]

I have another issue now,help me please https://community.nxp.com/t5/i-MX-RT/How-can-I-link-variable-to-HyperRAM-in-debug-mode/td-p/1666624 

[Vinos]

Yes,I've read all the relevant documents before.
I initialized hyperram successfully just now,the reference manual said that FlexSPI1 secondary group has a limit flash frequency under 100MHz on page 265.It's same for hyperram.

[patriciocohen]

Hi @Vinos 

Can you please tell me how you did it? I have a very similar problem. 

In my case Hyperram is connected to FLEXSPI2 and QSPI NOR FLash to FLEXSPI1.

Thank you very much.

Patricio