Hi,
I'm struggling to get one of the CAN examples on my IMXRT1170-EVKB board to send messages over CAN bus.
On the board I've connected CAN3 to a local test CAN bus going into a Teensy via a CAN transceiver with termination resistors. I am monitoring the RX and TX signals on the Teensy via a logic analyser. I ensure that the bus speed matches at both ends (1Mb/s)
I've tried various examples for example "evkbmimxrt1170_flexcan_interrupt_transfer_cm7". When I run the example I see:
* A breakpoint set in the interrupt "flexcan_callback" is never hit.
* After selecting node "a" the code is stuck in the while (!txComplete) - which never completes as "txComplete" is set in the interrupt which is never called.
* I don't see any signals on the logic analyser.
* However, if I swap the IMXRT1170-EVKB for an IMXRT1064-EVK board I have and use the same example, the message is sent successfully. I see the message arrive in the Teensy, appear on the logic analyser and the breakpoint is hit in the interrupt routine. So I don't think its my hardware setup.
Any thoughts about what could be wrong and how to debug further.
Thanks
Nick
Solved! Go to Solution.
For anyone that might suffer similar difficulties in the future the solution is to "Remove J102 and J103 jumpers.". I found this in the docs/readme.md associated with the CAN example ... I should have read the manual!
For anyone that might suffer similar difficulties in the future the solution is to "Remove J102 and J103 jumpers.". I found this in the docs/readme.md associated with the CAN example ... I should have read the manual!
Can you explain a little more about your setup. The setup that works for me is:
* From MCUXpresso choose "import SDK example" and select "canfd_interrupt_transfer_cm7"
* Connect CANH and CANL to CAN3 header - J47 see attached image
* Connect another board to receive/transmit on CAN id: 0x123 or 0x321 (see sample), ensure the CAN data rate is setup identically at both ends
* Connect a logic analyser to monitor what is happening on the CAN bus
* Stick a break point in the code sample interrupt routine.
* Run the sample.
* Observe the message in the logic analyser and see the break point being hit in the interrupt routine.
Hope this helps
Nick