interpretation of device tree block

[damienhuang]

Hi,

Could someone help to interpret the below device tree structure  in imx6qdl.dtsi?

gpio4: gpio@020a8000 {

                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";

                reg = <0x020a8000 0x4000>;

                interrupts = <0 72 0x04 0 73 0x04>;

                gpio-controller;

                #gpio-cells = <2>;

                interrupt-controller;

                #interrupt-cells = <2>;

            };

my problem is I can not figure out the meaning of "interrupts = <0 72 0x04 0 73 0x04>"

[damienhuang]

combining your info and the fsl-imx-gpio.txt, I think the 6 values were belong to two interrupts

     first interrupt

          the first byte is type of interrupt (0 = spi interrupt, 1 = ppi interrupt)

          the seconds byte is the port that hosts the low 16 pins

          the third byte is the interrupt level

     second interrupt

          the fourth byte is the same of the first byte

          the fifth byte is the port that hosts the high 16 pins

          the sixth byte is the interrupt level

[igorpadykov]

Hi Damien

description can be found on p.8 AN5125 http://cache.nxp.com/files/32bit/doc/app_note/AN5125.pdf  or

http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/Documentation/devicetree/bindings/g...

Best regards

igor

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[damienhuang]

thanks igor for your message.

Even after read through the links you provided, I am still not able to understand the data block I listed with this question. Because in my data block there are six value inside structure "interrupts", but the links only talked with 2 values situation.

Do you have more info?

Best regards,

Damien

[igorpadykov · Accepted solution]

below part of AN5125, assuming two cells (so six values):

Best regards

igor