imx6dl: lvds pixel clock seems to limited to 42.5 MHz

[lzenz]

Hello,

we have to support am 1280x800 display with single lvds channel. A display clock with 68 MHz is required. We're using the 3.10.17 kernel.

Everthing is ok when i set the pixel clock to 42.5 MHz and below. Higher clocks do not work but should since the imx6dl should deliver 85 MHz.

Thank you for helping.

Best regards,

Ludwig

[lzenz]

After debugging the clock initialization i tried different hardware. It was a hardware defect.

Thank you for your support.

Best regards,

Ludwig

[saurabh206 · Accepted solution]

Hi Ludwig

LDB clock can provide up to 85 MHz.

Please check your clock tree. Set correct parent clock according to your requirement.

[lzenz]

Thank you for your response.

Can you tell me where it should be done in the kernel code?

I was able to change ldb_di1_clk_sel but was not able to adjust ldb_di1_ipu_div.

[igorpadykov]

if splashscreen is enabled in uboot (CONFIG_SPLASH_SCREEN )

one can check  ..board/mx6qsabresd/mx6qsabresd.c setup_display(void)

Best regards

igor