imx6D PMU_REG_CORE

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imx6D PMU_REG_CORE

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allen_kim1
Contributor I

Dear Community 

i have a question about PMU_REG_CORE register  on imx6d

i want change REG1_TARG value

change PMU_REG_CORE log

root@imx6qdlsolo:/unit_tests# ./memtool -32 0x020c8140 1

E

Reading 0x1 count starting at address 0x020C8140

 

0x020C8140:  004C000B

 

root@imx6qdlsolo:/unit_tests# ./memtool -32 0x020c8140=0x004c200b

Writing 32-bit value 0x4C200B to address 0x020C8140

root@imx6qdlsolo:/unit_tests#

root@imx6qdlsolo:/unit_tests# ./memtool -32 0x020c8140 1

E

Reading 0x1 count starting at address 0x020C8140

 

0x020C8140:  004C200B

 

root@imx6qdlsolo:/unit_tests# ./autorun-vpu.sh

Checking for devnode: /dev/mxc_vpu

autorun-vpu.sh: PASS devnode found: /dev/mxc_vpu

 

Running test case: ./mxc_vpu_test.out -C config_dec

[INFO]  VPU test program built on Sep 16 2016 00:25:03

[INFO]  Product Info: i.MX6Q/D/S

[INFO]  VPU firmware version: 3.1.1_r46072

[INFO]  VPU library version: 5.4.35

[INFO]  Format: STD_MPEG4

[INFO]  MPEG4 class: MPEG4

[INFO]  Input file "akiyo.mp4" opened.

[INFO]  bitstreamMode 0, chromaInterleave 0, mapType 0, tiled2LinearEnable 0

[INFO]  Mpeg4 Profile: 0 Level: 3 Interlaced: 0

[INFO]  Aspect Ratio Table index: 1

[INFO]  Decoder: width = 176, height = 144, frameRateRes = 15, frameRateDiv = 4294967295, count = 4

[INFO]  CROP left/top/right/bottom 0 0 0 0

[INFO]  v4l output to /dev/video17

[INFO]  Display to 1024 768, top offset 0, left offset 0

[INFO]  Display fps will be 30

 

 

^C[WARN]        Ctrl-C received

[INFO]  100 frames took 3238842 microseconds

[INFO]  dec fps = 2109.48

[INFO]  total fps= 30.88

autorun-vpu.sh: PASS test case: ./mxc_vpu_test.out -C config_dec

 

^C

root@imx6qdlsolo:/unit_tests# ./memtool -32 0x020c8140 1

E

Reading 0x1 count starting at address 0x020C8140

 

0x020C8140:  004C000B

PMU_REG_CORE register value is restored after  vpu test script 

i wonder that why that value is restored ? 

how can i setting PMU_REG_CORE vaule 

Thanks BR

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jamesbone
NXP TechSupport
NXP TechSupport

Please check the following link:

https://community.nxp.com/message/428698 

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