Hello,
We have been developing a system software for Freescale i.MX6Q using i.MX6Q Sabre Lite.
We encountered imprecise external abort (0x1c06) suddenly, we think it seemed the problem in regards to coherency between L2 Cache and CPU Cores.
According to Table B3-23 in the DDI0406C, FS was 11010, it means implementation defined. .
Could you please advise us on the issue ? We would like to know why the abort was happened, and tell us a workaround if you have already known the issue.
Thank you in advance,
-Yoshinori Kimura
Yoshinori-san, please respond Jakcy's question. Your discussion issue will be closed if no response in 3 days.
Thanks,
Yixing
Yoshinori-san, could you please respond to Jacky's question. We will close the discussion if no response in 3 days.
Thanks,
Yixing
Hi Yoshinori Kimura,
Could you provide the details about the problem? What is the procedure and the code to reproduce the problem?
Regards,
Jacky