iMX8QXP: lpspi0 not working (PER clock rate = 0)

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

iMX8QXP: lpspi0 not working (PER clock rate = 0)

4,995 Views
thomasritter
Contributor I

I try to get lpspi0 working on iMX8QXP, but get error

[ 240.903806] fsl_lpspi 5a000000.spi: per-clk (0) should be at least two times of transfer speed (8666666)

I hacked the driver spi-fsl-lpspi.c, so it prints the PER clk-rate and the expected speed when encountering issue in
static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi)

Also added a line to show probe was ok, yet also @ probe time PER clk is zero
[ 1.063590] fsl_lpspi 5a000000.spi: LPSPI probed IPG:160000000 PER:0

I am on latest kernel from https://source.codeaurora.org/external/imx/linux-imx.git
branch imx_5.4.47_2.2.0

the DT entry in imx8-ss-dma.dtsi
What look suspicious is that the oreder in "assigned-clocks" seems different than "clock-names"
Marked bold.

lpspi0: spi@5a000000 {
compatible = "fsl,imx7ulp-spi", "fsl,imx8qxp-spi";
reg = <0x5a000000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clocks = <&spi0_lpcg 0>,
<&spi0_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <20000000>;
power-domains = <&pd IMX_SC_R_SPI_0>;
dma-names = "tx","rx";
dmas = <&edma2 1 0 0>, <&edma2 0 0 1>;
status = "disabled";
};

plus my override

&lpspi0 {
fsl,spi-num-chipselects = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi0>;
status = "okay";


secton: secton2@0 {
reg = <0>;
compatible = "atk,secton";
spi-max-frequency = <10000000>;
};
};

Any hints why the per-clk rate has always value 0 ? For ipg-clk I get value 160000000

 

0 Kudos
Reply
17 Replies

4,433 Views
agupta14
Contributor III
lpspi1: spi@5a010000 {
compatible = "fsl,imx7ulp-spi";
reg = <0x5a010000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clocks = <&spi1_lpcg 0>,
<&spi1_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <60000000>;
power-domains = <&pd IMX_SC_R_SPI_1>;
dma-names = "tx","rx";
dmas = <&edma2 3 0 0>, <&edma2 2 0 1>;
status = "disabled";
};
 
lpspi2: spi@5a020000 {
compatible = "fsl,imx7ulp-spi";
reg = <0x5a020000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clocks = <&spi2_lpcg 0>,
<&spi2_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <60000000>;
power-domains = <&pd IMX_SC_R_SPI_2>;
dma-names = "tx","rx";
dmas = <&edma2 5 0 0>, <&edma2 4 0 1>;
status = "disabled";
};

&lpspi1 {
#address-cells = <1>;
#size-cells = <0>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <0>, <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi0>;
spi-3wire;
status = "okay";
jdstft: display@0 {
compatible = "linux,spidev";
spi-max-frequency = <500000>;
reg = <0>;
};
};
 
 

&lpspi2 {
#address-cells = <1>;
#size-cells = <0>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <0>, <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi2>;
status = "okay";
lp8660: leddriver@0 {
compatible = "linux,spidev";
spi-max-frequency = <500000>;
reg = <0>;
};
};


below error we are getting  but i am not enabling SPI0

[ 8.036801] spidev spi0.0: SPI transfer failed: -110
[ 8.041844] spi_master spi0: failed to transfer one message from queue





0 Kudos
Reply

4,425 Views
derknut1
Contributor I

Fix is for: per-clk (0) should be at least two times of transfer speed

with too low base speed in SoC device tree.

>below error we are getting but i am not enabling SPI0

>[ 8.036801] spidev spi0.0: SPI transfer failed: -110
>[ 8.041844] spi_master spi0: failed to transfer one message from queue

Linux SPI numbering is given by board device tree ( I guess)

0 Kudos
Reply

4,438 Views
agupta14
Contributor III

is this fix for lpspi1 and lpspi2 

0 Kudos
Reply

4,784 Views
heikoschocher
Contributor II

Hi all,

same problem for me on imx8qxp based board with branch imx_5.4.70_2.3.0

Is it possible to share this patch (or a solution) ?

 

Thanks in advance

Heiko

0 Kudos
Reply

4,763 Views
WoK
Contributor I

There seems to be low freq. at lpspi0 base clock definition:

Replace "assigned-clock-rates = <20000000>;" with "assigned-clock-rates = <60000000>;" in arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi (as for lpspi2/3/...) was helpful with my problem (per-clk: 0)

0 Kudos
Reply

4,757 Views
heikoschocher
Contributor II

Hi WoK,

I adapted as you suggested:

"""
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index fd1faaca1909..4d4056e546da 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -30,7 +30,7 @@ dma_subsys: bus@5a000000 {
                        <&spi0_lpcg 1>;
               clock-names = "per", "ipg";
               assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
-               assigned-clock-rates = <20000000>;
+               assigned-clock-rates = <60000000>;
               power-domains = <&pd IMX_SC_R_SPI_0>;
               dma-names = "tx","rx";
               dmas = <&edma2 1 0 0>, <&edma2 0 0 1>;

"""

lpspi2 / 3 has already 60Mhz in DTS and this solves my problem!


Thanks!

0 Kudos
Reply

4,979 Views
joanxie
NXP TechSupport
NXP TechSupport

 I have sent the mail with patch to you, pls find it

0 Kudos
Reply

4,661 Views
Yuedong
Contributor I

hi,   joanxie, can you send to me the patch? my email address is 18089661@qq.com. i met the similar issue on imx8qxp mek.

0 Kudos
Reply

4,877 Views
derknut
Contributor I

Hello,

It seems I encounter a similar problem with my iMX8DXL board (per-clk: 0).

Please share your patch also to me.

Thanks a lot

Knut

0 Kudos
Reply

4,862 Views
joanxie
NXP TechSupport
NXP TechSupport

what's your email address?

 

0 Kudos
Reply

4,853 Views
derknut
Contributor I

Hello,

Thanks a lot for your response

Knut

 

0 Kudos
Reply

4,949 Views
DarrenJi
Contributor I

hi  joanxie: 

    I have similar issue, my per clk is 58181818 and spi transfer failed with retcode -1.

could you share the patch on this post ?

0 Kudos
Reply

4,861 Views
joanxie
NXP TechSupport
NXP TechSupport

have you fixed this issue? if no, pls tell me what your email address is

 

0 Kudos
Reply

1,377 Views
Anjali245
Contributor I

Hi,

We are facing the same issue on imx8qm MEK with yocto kernel version 5.15.52. Can you please share the patch or a solution to resolve this issue.

E-mail: anjali.s@ust.com 

Regards,

Anjali S

0 Kudos
Reply

3,657 Views
guilhermes
Contributor II

Hello @joanxie , sorry for reviving this thread but could you please email me this patch as well?

Facing the same issue with lpspi0 in i.MX8QXP-MEK (CPU + BaseBoard) with 5.10.72 kernel (Yocto hardknott)

0 Kudos
Reply

4,454 Views
agupta14
Contributor III

i am also facing the same issue with kernel version 5.10.9 

if anyone fix please share 

0 Kudos
Reply

4,449 Views
derknut1
Contributor I

See above post and check your kernel for:

"""
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index fd1faaca1909..4d4056e546da 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -30,7 +30,7 @@ dma_subsys: bus@5a000000 {
<&spi0_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
- assigned-clock-rates = <20000000>;
+ assigned-clock-rates = <60000000>;
power-domains = <&pd IMX_SC_R_SPI_0>;
dma-names = "tx","rx";
dmas = <&edma2 1 0 0>, <&edma2 0 0 1>;

 

0 Kudos
Reply