I try to get lpspi0 working on iMX8QXP, but get error
[ 240.903806] fsl_lpspi 5a000000.spi: per-clk (0) should be at least two times of transfer speed (8666666)
I hacked the driver spi-fsl-lpspi.c, so it prints the PER clk-rate and the expected speed when encountering issue in
static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi)
Also added a line to show probe was ok, yet also @ probe time PER clk is zero
[ 1.063590] fsl_lpspi 5a000000.spi: LPSPI probed IPG:160000000 PER:0
I am on latest kernel from https://source.codeaurora.org/external/imx/linux-imx.git
branch imx_5.4.47_2.2.0
the DT entry in imx8-ss-dma.dtsi
What look suspicious is that the oreder in "assigned-clocks" seems different than "clock-names"
Marked bold.
lpspi0: spi@5a000000 {
compatible = "fsl,imx7ulp-spi", "fsl,imx8qxp-spi";
reg = <0x5a000000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clocks = <&spi0_lpcg 0>,
<&spi0_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <20000000>;
power-domains = <&pd IMX_SC_R_SPI_0>;
dma-names = "tx","rx";
dmas = <&edma2 1 0 0>, <&edma2 0 0 1>;
status = "disabled";
};
plus my override
&lpspi0 {
fsl,spi-num-chipselects = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi0>;
status = "okay";
secton: secton2@0 {
reg = <0>;
compatible = "atk,secton";
spi-max-frequency = <10000000>;
};
};
Any hints why the per-clk rate has always value 0 ? For ipg-clk I get value 160000000
Fix is for: per-clk (0) should be at least two times of transfer speed
with too low base speed in SoC device tree.
>below error we are getting but i am not enabling SPI0
>[ 8.036801] spidev spi0.0: SPI transfer failed: -110
>[ 8.041844] spi_master spi0: failed to transfer one message from queue
Linux SPI numbering is given by board device tree ( I guess)
Hi all,
same problem for me on imx8qxp based board with branch imx_5.4.70_2.3.0
Is it possible to share this patch (or a solution) ?
Thanks in advance
Heiko
There seems to be low freq. at lpspi0 base clock definition:
Replace "assigned-clock-rates = <20000000>;" with "assigned-clock-rates = <60000000>;" in arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi (as for lpspi2/3/...) was helpful with my problem (per-clk: 0)
Hi WoK,
I adapted as you suggested:
"""
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index fd1faaca1909..4d4056e546da 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -30,7 +30,7 @@ dma_subsys: bus@5a000000 {
<&spi0_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
- assigned-clock-rates = <20000000>;
+ assigned-clock-rates = <60000000>;
power-domains = <&pd IMX_SC_R_SPI_0>;
dma-names = "tx","rx";
dmas = <&edma2 1 0 0>, <&edma2 0 0 1>;
"""
lpspi2 / 3 has already 60Mhz in DTS and this solves my problem!
Thanks!
Hello @joanxie , sorry for reviving this thread but could you please email me this patch as well?
Facing the same issue with lpspi0 in i.MX8QXP-MEK (CPU + BaseBoard) with 5.10.72 kernel (Yocto hardknott)
See above post and check your kernel for:
"""
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index fd1faaca1909..4d4056e546da 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -30,7 +30,7 @@ dma_subsys: bus@5a000000 {
<&spi0_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
- assigned-clock-rates = <20000000>;
+ assigned-clock-rates = <60000000>;
power-domains = <&pd IMX_SC_R_SPI_0>;
dma-names = "tx","rx";
dmas = <&edma2 1 0 0>, <&edma2 0 0 1>;