Dear NXP team,
from the imx8qm-mek.dts sample device tree, I can guess that 2 distinct displays can be driven simultaneously when linked to 2 different DPUs.
If I understand correctly the imx8qm-ss-dc.dtsi device tree, each DPU provides 2 ports and each port (but port0 of dpu2) provides 2 endpoints: totally I can see 7 endpoints.
Can all the 7 endpoints be used simultaneously?
More generally, for a specific port, can I use both the endpoints?
If not, can I simultaneously use 1 endpoint for each port (4 endpoints)?
Is there any reference documentation about the possible use of DPUs/ports/endpoints?
Thanks
Best Regards
Pier
Hi @pierluigi_p
Display Controller Supports single UltraHD 4Kp60 display or up to 4 independent FullHD 1080p60
displays
Display I/O
2× MIPI-DSI with 4 lanes each
1× HDMI-TX/DisplayPort compliant with:
• HDMI
• eDP 1.4
• DP 1.3
This high performance serializer supports a pair of LVDS displays with 8 lanes each.
Each port can be configured for 2x Tx with 4 lanes each.
dpu1 and dpu2 are two different definitions. You can't use dpu2 when using dpu1.
So the max number of screen is 4 if you want to display 4 different contents.
The lvds0 ch0 and ch1 share same rgb data, you can use connect 2 display devices to lvds0. But they display same content.
Is there any reference documentation about the possible use of DPUs/ports/endpoints?
--->See i.mx8qm datasheet
Hi @Zhiming_Liu,
according the iMX8QM datasheet, I understand I can get 4 displays, one for each port, 2 from dpu1 and 2 from dpu2, is this correct?
How can I get 4 displays if I "can't use dpu2 when using dpu1" ?
Thanks
Best Regards
Pier